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gpu: nvgpu: pmgr: fix MISRA Rule 10.4 Violations

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MISRA Rule 10.4 only allows the usage of arithmetic operations on
operands of the same essential type category.

Adding "U" at the end of the integer literals to have same type of
operands when an arithmetic operation is performed.

This fixes violation where an arithmetic operation is performed on
signed and unsigned int types.

JIRA NVGPU-992

Change-Id: Id3b2c8ea1af1807087468c6978abfbfc85bee2ec
Signed-off-by: Sai Nikhil <snikhil@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1809757
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sai Nikhil
2018-09-11 10:38:54 +05:30
committed by mobile promotions
parent c18c8b5b28
commit c6cfb12d91
7 changed files with 55 additions and 55 deletions
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4
drivers/gpu/nvgpu/pmgr/pwrdev.c
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@@ -40,7 +40,7 @@ static int _pwr_device_pmudata_instget(struct gk20a *g,
/*check whether pmuboardobjgrp has a valid boardobj in index*/
if (((u32)BIT(idx) &
ppmgrdevice->hdr.data.super.obj_mask.super.data[0]) == 0) {
ppmgrdevice->hdr.data.super.obj_mask.super.data[0]) == 0U) {
return -EINVAL;
}
@@ -191,7 +191,7 @@ static int devinit_get_pwr_device_table(struct gk20a *g,
memcpy(&pwr_sensor_table_entry.class_param0,
(curr_pwr_device_table_ptr + 1),
(VBIOS_POWER_SENSORS_2X_ENTRY_SIZE_15 - 1));
(VBIOS_POWER_SENSORS_2X_ENTRY_SIZE_15 - 1U));
device_type = (u8)BIOS_GET_FIELD(
pwr_sensor_table_entry.flags0,