From c79a3dbc3abf40bf5a391f23b92d193bfe0e827e Mon Sep 17 00:00:00 2001 From: smadhavan Date: Tue, 11 Aug 2020 22:01:12 +0530 Subject: [PATCH] gpu: nvgpu: check only priv_sec_en fuse in fmodel - On simulation, use --gpu_brom_args to set priv_sec_en fuse. wpr and auto_fetch_disable are set to expected values with "-vpr_load_from_pri_reg" during simulation launch Bug 200638707 Change-Id: Ia440326a77a800bb739103bb0f0dbe06c3c741f2 Signed-off-by: smadhavan Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2397510 Reviewed-by: automaticguardword Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Seema Khowala Reviewed-by: Deepak Nibade Reviewed-by: mobile promotions GVS: Gerrit_Virtual_Submit Tested-by: Seema Khowala Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/fuse/fuse_gp10b_fusa.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/fuse/fuse_gp10b_fusa.c b/drivers/gpu/nvgpu/hal/fuse/fuse_gp10b_fusa.c index 7e81bb4c0..2e538de2f 100644 --- a/drivers/gpu/nvgpu/hal/fuse/fuse_gp10b_fusa.c +++ b/drivers/gpu/nvgpu/hal/fuse/fuse_gp10b_fusa.c @@ -1,7 +1,7 @@ /* * GP10B FUSE * - * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -39,15 +39,6 @@ int gp10b_fuse_check_priv_security(struct gk20a *g) bool is_wpr_enabled = false; bool is_auto_fetch_disable = false; -#ifdef CONFIG_NVGPU_SIM - if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { - nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, false); - nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false); - nvgpu_log(g, gpu_dbg_info, "priv sec is disabled in fmodel"); - return 0; - } -#endif - if (g->ops.fuse.read_gcplex_config_fuse(g, &gcplex_config) != 0) { nvgpu_err(g, "err reading gcplex config fuse, check fuse clk"); return -EINVAL; @@ -62,6 +53,15 @@ int gp10b_fuse_check_priv_security(struct gk20a *g) */ nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, true); nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true); +#ifdef CONFIG_NVGPU_SIM + if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { + /* + * Do not check other fuses as they are not yet modeled + * on FMODEL. + */ + return 0; + } +#endif is_wpr_enabled = (gcplex_config & GCPLEX_CONFIG_WPR_ENABLED_MASK) != 0U; is_auto_fetch_disable =