From c7d495ffd6b5f886ef848ec4e64ec76a2f379cc0 Mon Sep 17 00:00:00 2001 From: Sagar Kamble Date: Thu, 21 Oct 2021 09:41:12 +0530 Subject: [PATCH] gpu: nvgpu: fix misra rule 3.1 violation With http path for ECC hw ref manual specified with two forward slashes within comment block rule 3.1 is violated. We can specify the http path with single forward slash. Fix it. Change-Id: I310869995e1d064b4216a3ed99ea57f78cf78d8d Signed-off-by: Sagar Kamble Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2614150 Reviewed-by: V M S Seeta Rama Raju Mudundi Reviewed-by: Ankur Kishore Reviewed-by: mobile promotions (cherry picked from commit 0e1cb893d2637badece8d39f93f4025e92d8bd8e) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2706558 Reviewed-by: Vaibhav Kachore GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/include/nvgpu/gops/ltc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops/ltc.h b/drivers/gpu/nvgpu/include/nvgpu/gops/ltc.h index 9665409c1..14345179e 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gops/ltc.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gops/ltc.h @@ -52,7 +52,7 @@ struct gops_ltc_intr { * - For each ltc slice \a slice from 0 to g->ltc->slices_per_ltc - 1: * -# The L2 has SEC-DED protection on its data RAM and parity protection on the * byte enables RAM. - * -# See Ampere_gpu_resiliency_ECC.doc for details. * -# Following PRI registers are used for controlling parity ECC and * getting the status and information of ECC. * -# Control: