gpu: nvgpu: unit: add SWUTS docs for falcon unit tests

This adds the SWUTS documentation for nvgpu-runlist unit tests:
 - test_falcon_sw_init_free
 - test_falcon_reset
 - test_falcon_mem_scrub
 - test_falcon_idle
 - test_falcon_halt
 - test_falcon_mem_rw_init
 - test_falcon_mem_rw_range
 - test_falcon_mem_rw_aligned
 - test_falcon_mem_rw_zero
 - test_falcon_mailbox
 - test_falcon_bootstrap

JIRA NVGPU-3943

Change-Id: I343cb12f884844d778e94c7e9df7bae9dbdbe3c0
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2208834
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2019-09-30 22:38:08 +05:30
committed by Alex Waterman
parent 9ad3de64b1
commit c7d51e4838
4 changed files with 329 additions and 23 deletions

View File

@@ -34,6 +34,7 @@
* - @ref SWUTS-interface-bsearch
* - @ref SWUTS-interface-lock
* - @ref SWUTS-interface-rbtree
* - @ref SWUTS-falcon
* - @ref SWUTS-fifo
* - @ref SWUTS-fifo-channel
* - @ref SWUTS-fifo-runlist

View File

@@ -4,6 +4,7 @@ INPUT += ../../../userspace/units/enabled/nvgpu-enabled.h
INPUT += ../../../userspace/units/interface/bsearch/bsearch.h
INPUT += ../../../userspace/units/interface/lock/lock.h
INPUT += ../../../userspace/units/interface/rbtree/rbtree.h
INPUT += ../../../userspace/units/falcon/falcon_tests/nvgpu-falcon.h
INPUT += ../../../userspace/units/fifo/nvgpu-fifo.h
INPUT += ../../../userspace/units/fifo/channel/nvgpu-channel.h
INPUT += ../../../userspace/units/fifo/runlist/nvgpu-runlist.h

View File

@@ -32,6 +32,7 @@
#include <nvgpu/hw/gv11b/hw_falcon_gv11b.h>
#include "../falcon_utf.h"
#include "nvgpu-falcon.h"
struct utf_falcon *utf_falcons[FALCON_ID_END];
@@ -331,7 +332,7 @@ out:
* Valid/Invalid: Passing valid ID should succeed the call to function
* nvgpu_falcon_sw_init|free. Otherwise it should fail with error.
*/
static int test_falcon_sw_init_free(struct unit_module *m, struct gk20a *g,
int test_falcon_sw_init_free(struct unit_module *m, struct gk20a *g,
void *__args)
{
int err;
@@ -419,8 +420,7 @@ static void flcn_mem_scrub_fail(void *data)
* falcon_falcon_cpuctl_hreset_f(1).
* Invalid: Reset of uninitialized and null falcon fails with error -EINVAL.
*/
static int test_falcon_reset(struct unit_module *m, struct gk20a *g,
void *__args)
int test_falcon_reset(struct unit_module *m, struct gk20a *g, void *__args)
{
struct {
struct nvgpu_falcon *flcn;
@@ -467,8 +467,7 @@ static int test_falcon_reset(struct unit_module *m, struct gk20a *g,
* Set the mem scrubbing status as pending and call should return
* -ETIMEDOUT.
*/
static int test_falcon_mem_scrub(struct unit_module *m, struct gk20a *g,
void *__args)
int test_falcon_mem_scrub(struct unit_module *m, struct gk20a *g, void *__args)
{
struct {
struct nvgpu_falcon *flcn;
@@ -535,8 +534,7 @@ static void flcn_idle_fail(void *data)
* call should return 0. Set it to non-idle and call should return
* -ETIMEDOUT.
*/
static int test_falcon_idle(struct unit_module *m, struct gk20a *g,
void *__args)
int test_falcon_idle(struct unit_module *m, struct gk20a *g, void *__args)
{
struct {
struct nvgpu_falcon *flcn;
@@ -596,8 +594,7 @@ static void flcn_halt_fail(void *data)
* call should return 0. Set it to non-halted and call should return
* -ETIMEDOUT.
*/
static int test_falcon_halt(struct unit_module *m, struct gk20a *g,
void *__args)
int test_falcon_halt(struct unit_module *m, struct gk20a *g, void *__args)
{
#define FALCON_WAIT_HALT 200
struct {
@@ -633,7 +630,7 @@ static int test_falcon_halt(struct unit_module *m, struct gk20a *g,
* Invalid: Read and write for uninitialized Falcon fails
* with error -EINVAL.
*/
static int test_falcon_mem_rw_init(struct unit_module *m, struct gk20a *g,
int test_falcon_mem_rw_init(struct unit_module *m, struct gk20a *g,
void *__args)
{
u32 dst = 0;
@@ -668,7 +665,7 @@ static int test_falcon_mem_rw_init(struct unit_module *m, struct gk20a *g,
* Invalid: Reading and writing data out of Falcon memory bounds should
* return error -EINVAL.
*/
static int test_falcon_mem_rw_range(struct unit_module *m, struct gk20a *g,
int test_falcon_mem_rw_range(struct unit_module *m, struct gk20a *g,
void *__args)
{
u32 byte_cnt = RAND_DATA_SIZE;
@@ -742,7 +739,7 @@ static int test_falcon_mem_rw_range(struct unit_module *m, struct gk20a *g,
* Invalid: Reading and writing data out of non-word-aligned offset in Falcon
* memory should return error -EINVAL.
*/
static int test_falcon_mem_rw_aligned(struct unit_module *m, struct gk20a *g,
int test_falcon_mem_rw_aligned(struct unit_module *m, struct gk20a *g,
void *__args)
{
u32 byte_cnt = RAND_DATA_SIZE;
@@ -783,7 +780,7 @@ static int test_falcon_mem_rw_aligned(struct unit_module *m, struct gk20a *g,
/*
* Reading/writing zero bytes should return error -EINVAL.
*/
static int test_falcon_mem_rw_zero(struct unit_module *m, struct gk20a *g,
int test_falcon_mem_rw_zero(struct unit_module *m, struct gk20a *g,
void *__args)
{
u32 byte_cnt = 0;
@@ -817,8 +814,7 @@ static int test_falcon_mem_rw_zero(struct unit_module *m, struct gk20a *g,
* Read the value through this interface and verify that it matches
* the register value.
*/
static int test_falcon_mailbox(struct unit_module *m, struct gk20a *g,
void *__args)
int test_falcon_mailbox(struct unit_module *m, struct gk20a *g, void *__args)
{
#define SAMPLE_MAILBOX_DATA 0xDEADBEED
u32 val, reg_data, mailbox_addr, i;
@@ -887,8 +883,7 @@ static bool falcon_check_reg_group(struct gk20a *g,
* nvgpu_falcon_bl_info struct and verify IMEM, DMEM and registers
* related to nvgpu_falcon_bootstrap interface.
*/
static int test_falcon_bootstrap(struct unit_module *m, struct gk20a *g,
void *__args)
int test_falcon_bootstrap(struct unit_module *m, struct gk20a *g, void *__args)
{
#define BL_DESC_SIZE 64
struct nvgpu_falcon_bl_info bl_info;

View File

@@ -0,0 +1,309 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
struct gk20a;
struct unit_module;
/** @addtogroup SWUTS-falcon
* @{
*
* Software Unit Test Specification for falcon
*/
/**
* Test specification for: test_falcon_sw_init_free
*
* Description: The falcon unit shall be able to initialize the falcon's
* base register address, required software setup for valid falcon ID.
*
* Test Type: Feature based
*
* Input: None.
*
* Steps:
* - Invoke nvgpu_falcon_sw_init with valid falcon ID before initializing HAL.
* - Verify that falcon initialization fails since valid gpu_arch|impl
* are not initialized.
* - Initialize the test environment:
* - Register read/write IO callbacks that handle falcon IO as well.
* - Add relevant fuse registers to the register space.
* - Initialize hal to setup the hal functions.
* - Initialize UTF (Unit Test Framework) falcon structures for PMU and
* GPCCS falcons.
* - Create and initialize test buffer with random data.
* - Invoke nvgpu_falcon_sw_init with invalid falcon ID.
* - Verify that falcon initialization fails.
* - Invoke nvgpu_falcon_sw_init with valid falcon ID.
* - Verify that falcon initialization succeeds.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
*/
int test_falcon_sw_init_free(struct unit_module *m, struct gk20a *g,
void *__args);
/**
* Test specification for: test_falcon_reset
*
* Description: The falcon unit shall be able to reset the falcon CPU or trigger
* engine specific reset for valid falcon ID.
*
* Test Type: Feature based
*
* Input: None.
*
* Steps:
* - Invoke nvgpu_falcon_reset with NULL falcon pointer.
* - Verify that reset fails with -EINVAL return value.
* - Invoke nvgpu_falcon_reset with uninitialized falcon struct.
* - Verify that reset fails with -EINVAL return value.
* - Invoke nvgpu_falcon_reset with valid falcon ID.
* - Verify that falcon initialization succeeds and check that bit
* falcon_cpuctl_hreset_f is set in falcon_cpuctl register.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
*/
int test_falcon_reset(struct unit_module *m, struct gk20a *g, void *__args);
/**
* Test specification for: test_falcon_mem_scrub
*
* Description: The falcon unit shall be able to check and return the falcon
* memory scrub status.
*
* Test Type: Feature based
*
* Input: None.
*
* Steps:
* - Invoke nvgpu_falcon_mem_scrub_wait with uninitialized falcon struct.
* - Verify that wait fails with -EINVAL return value.
* - Invoke nvgpu_falcon_mem_scrub_wait with initialized falcon struct where
* underlying falcon's memory scrub is completed.
* - Verify that wait succeeds with 0 return value.
* - Invoke nvgpu_falcon_mem_scrub_wait with initialized falcon struct where
* underlying falcon's memory scrub is yet to complete.
* - Verify that wait fails with -ETIMEDOUT return value.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
*/
int test_falcon_mem_scrub(struct unit_module *m, struct gk20a *g, void *__args);
/**
* Test specification for: test_falcon_idle
*
* Description: The falcon unit shall be able to check and return the falcon
* idle status.
*
* Test Type: Feature based
*
* Input: None.
*
* Steps:
* - Invoke nvgpu_falcon_wait_idle with uninitialized falcon struct.
* - Verify that wait fails with -EINVAL return value.
* - Invoke nvgpu_falcon_wait_idle with initialized falcon struct where
* underlying falcon is idle.
* - Verify that wait succeeds with 0 return value.
* - Invoke nvgpu_falcon_wait_idle with initialized falcon struct where
* underlying falcon is not idle.
* - Verify that wait fails with -ETIMEDOUT return value.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
*/
int test_falcon_idle(struct unit_module *m, struct gk20a *g, void *__args);
/**
* Test specification for: test_falcon_halt
*
* Description: The falcon unit shall be able to check and return the falcon
* halt status.
*
* Test Type: Feature based
*
* Input: None.
*
* Steps:
* - Invoke nvgpu_falcon_wait_for_halt with uninitialized falcon struct.
* - Verify that wait fails with -EINVAL return value.
* - Invoke nvgpu_falcon_wait_for_halt with initialized falcon struct where
* underlying falcon is halted.
* - Verify that wait succeeds with 0 return value.
* - Invoke nvgpu_falcon_wait_for_halt with initialized falcon struct where
* underlying falcon is not halted.
* - Verify that wait fails with -ETIMEDOUT return value.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
*/
int test_falcon_halt(struct unit_module *m, struct gk20a *g, void *__args);
/**
* Test specification for: test_falcon_mem_rw_init
*
* Description: The falcon unit shall be able to write to falcon's IMEM and
* DMEM.
*
* Test Type: Feature based
*
* Input: None.
*
* Steps:
* - Invoke nvgpu_falcon_copy_to_imem and nvgpu_falcon_copy_to_dmem with
* uninitialized falcon struct with sample random data.
* - Verify that writes fail with -EINVAL return value in both cases.
* - Invoke nvgpu_falcon_copy_to_imem and nvgpu_falcon_copy_to_dmem with
* initialized falcon struct with sample random data.
* - Verify that writes succeed with 0 return value in both cases.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
*/
int test_falcon_mem_rw_init(struct unit_module *m, struct gk20a *g,
void *__args);
/**
* Test specification for: test_falcon_mem_rw_range
*
* Description: The falcon unit shall be able to write to falcon's IMEM and
* DMEM in accessible range.
*
* Test Type: Feature based
*
* Input: None.
*
* Steps:
* - Invoke nvgpu_falcon_copy_to_imem and nvgpu_falcon_copy_to_dmem with
* initialized falcon struct with sample random data and valid range.
* - Verify that writes succeed with 0 return value in both cases.
* - Invoke nvgpu_falcon_copy_to_imem and nvgpu_falcon_copy_to_dmem with
* initialized falcon struct with sample random data and invalid range.
* - Verify that writes fail with -EINVAL return value in both cases.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
*/
int test_falcon_mem_rw_range(struct unit_module *m, struct gk20a *g,
void *__args);
/**
* Test specification for: test_falcon_mem_rw_aligned
*
* Description: The falcon unit shall be able to write to falcon's IMEM and
* DMEM only at aligned offsets.
*
* Test Type: Feature based
*
* Input: None.
*
* Steps:
* - Invoke nvgpu_falcon_copy_to_imem and nvgpu_falcon_copy_to_dmem with
* initialized falcon struct with sample random data and 4-byte aligned
* offset.
* - Verify that writes succeed with 0 return value in both cases.
* - Invoke nvgpu_falcon_copy_to_imem and nvgpu_falcon_copy_to_dmem with
* initialized falcon struct with sample random data and non 4-byte
* aligned offset.
* - Verify that writes fail with -EINVAL return value in both cases.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
*/
int test_falcon_mem_rw_aligned(struct unit_module *m, struct gk20a *g,
void *__args);
/**
* Test specification for: test_falcon_mem_rw_zero
*
* Description: The falcon unit shall fail the API call to write zero
* bytes to falcon memory.
*
* Test Type: Feature based
*
* Input: None.
*
* Steps:
* - Invoke nvgpu_falcon_copy_to_imem and nvgpu_falcon_copy_to_dmem with
* initialized falcon struct with sample random data and zero bytes.
* - Verify that writes fail with -EINVAL return value in both cases.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
*/
int test_falcon_mem_rw_zero(struct unit_module *m, struct gk20a *g,
void *__args);
/**
* Test specification for: test_falcon_mailbox
*
* Description: The falcon unit shall read and write value of falcon's mailbox
* registers.
*
* Test Type: Feature based
*
* Input: None.
*
* Steps:
* - Invoke nvgpu_falcon_mailbox_read and nvgpu_falcon_mailbox_write with
* uninitialized falcon struct.
* - Verify that read returns zero.
* - Write a sample value to mailbox registers and read using the nvgpu APIs.
* - Verify the value by reading the registers through IO accessor.
* - Read/Write value from invalid mailbox register of initialized falcon.
* - Verify that read returns zero.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
*/
int test_falcon_mailbox(struct unit_module *m, struct gk20a *g, void *__args);
/**
* Test specification for: test_falcon_bootstrap
*
* Description: The falcon unit shall configure the bootloader parameters into
* falcon memory and registers.
*
* Test Type: Feature based
*
* Input: None.
*
* Steps:
* - Invoke nvgpu_falcon_bootstrap and nvgpu_falcon_bl_bootstrap with
* uninitialized falcon struct.
* - Verify that calls fail with -EINVAL return value in both cases.
* - Invoke nvgpu_falcon_bootstrap with sample boot_vector value and
* verify the expected state of Falcon registers - falcon_dmactl_r,
* falcon_falcon_bootvec_r, falcon_falcon_cpuctl_r.
* - Invoke nvgpu_falcon_bl_bootstrap with invalid parameters filled in
* nvgpu_falcon_bl_info struct and verify that nvgpu_falcon_bootstrap
* fails.
* - Invoke nvgpu_falcon_bl_bootstrap with sample parameters filled in
* nvgpu_falcon_bl_info struct and verify IMEM, DMEM and registers
* related to nvgpu_falcon_bootstrap interface.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
*/
int test_falcon_bootstrap(struct unit_module *m, struct gk20a *g, void *__args);