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gpu: nvgpu: add cg and pg function
Add new power/clock gating functions that can be called by
other units.
New clock_gating functions will reside in cg.c under
common/power_features/cg unit.
New power gating functions will reside in pg.c under
common/power_features/pg unit.
Use nvgpu_pg_elpg_disable and nvgpu_pg_elpg_enable to disable/enable
elpg and also in gr_gk20a_elpg_protected macro to access gr registers.
Add cg_pg_lock to make elpg_enabled, elcg_enabled, blcg_enabled
and slcg_enabled thread safe.
JIRA NVGPU-2014
Change-Id: I00d124c2ee16242c9a3ef82e7620fbb7f1297aff
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2025493
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry-picked from c905858565 in
dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/2108406
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -30,6 +30,7 @@
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#include <nvgpu/io.h>
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#include <nvgpu/utils.h>
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#include <nvgpu/channel.h>
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#include <nvgpu/power_features/cg.h>
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#include "gk20a.h"
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#include "gk20a/fence_gk20a.h"
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@@ -339,14 +340,9 @@ int gk20a_init_ce_support(struct gk20a *g)
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g->ops.mc.reset(g, ce_reset_mask);
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if (g->ops.clock_gating.slcg_ce2_load_gating_prod) {
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g->ops.clock_gating.slcg_ce2_load_gating_prod(g,
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g->slcg_enabled);
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}
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if (g->ops.clock_gating.blcg_ce_load_gating_prod) {
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g->ops.clock_gating.blcg_ce_load_gating_prod(g,
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g->blcg_enabled);
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}
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nvgpu_cg_slcg_ce2_load_enable(g);
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nvgpu_cg_blcg_ce_load_enable(g);
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if (ce_app->initialised) {
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/* assume this happen during poweron/poweroff GPU sequence */
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