gpu: nvgpu: add cg and pg function

Add new power/clock gating functions that can be called by
other units.

New clock_gating functions will reside in cg.c under
common/power_features/cg unit.

New power gating functions will reside in pg.c under
common/power_features/pg unit.

Use nvgpu_pg_elpg_disable and nvgpu_pg_elpg_enable to disable/enable
elpg and also in gr_gk20a_elpg_protected macro to access gr registers.

Add cg_pg_lock to make elpg_enabled, elcg_enabled, blcg_enabled
and slcg_enabled thread safe.

JIRA NVGPU-2014

Change-Id: I00d124c2ee16242c9a3ef82e7620fbb7f1297aff
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2025493
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry-picked from c905858565 in
dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/2108406
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/gk20a/gr_gk20a.h

@@ -28,6 +28,7 @@
 
 #include "gr_ctx_gk20a.h"
 #include "mm_gk20a.h"
+#include <nvgpu/power_features/pg.h>
 
 #include <nvgpu/comptags.h>
 #include <nvgpu/cond.h>
@@ -598,16 +599,16 @@ u32 gk20a_gr_get_sm_no_lock_down_hww_global_esr_mask(struct gk20a *g);
 #define gr_gk20a_elpg_protected_call(g, func) \
 	({ \
 		int err = 0; \
-		if ((g->support_pmu) && (g->elpg_enabled)) {\
-			err = nvgpu_pmu_disable_elpg(g); \
+		if (g->support_pmu) {\
+			err = nvgpu_pg_elpg_disable(g);\
 			if (err != 0) {\
-				nvgpu_pmu_enable_elpg(g); \
+				err = nvgpu_pg_elpg_enable(g); \
 			} \
 		} \
 		if (err == 0) { \
 			err = func; \
-			if ((g->support_pmu) && (g->elpg_enabled)) {\
-				nvgpu_pmu_enable_elpg(g); \
+			if (g->support_pmu) {\
+				(void)nvgpu_pg_elpg_enable(g); \
 			} \
 		} \
 		err; \