gpu: nvgpu: fpga: set gr_idle_timeout_default

set gr_idle_timeout_default to 100000 ms instead of MAX_SCHEDULE_TIMEOUT,
and enable timeouts_enabled

Change-Id: I0b4d014dc6f3fc3c365214f7ffad7af054f771b9
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1458178
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

drivers/gpu/nvgpu/common/linux/soc.c

@@ -25,6 +25,11 @@ bool nvgpu_platform_is_simulation(struct gk20a *g)
 	return tegra_platform_is_linsim() || tegra_platform_is_vdk();
 }
 
+bool nvgpu_platform_is_fpga(struct gk20a *g)
+{
+	return tegra_platform_is_fpga();
+}
+
 bool nvgpu_is_hypervisor_mode(struct gk20a *g)
 {
 	return is_tegra_hypervisor_mode();

drivers/gpu/nvgpu/common/nvgpu_common.c

@@ -24,6 +24,7 @@
 
 #include "gk20a/gk20a_scale.h"
 #include "gk20a/gk20a.h"
+#include "gk20a/gr_gk20a.h"
 
 #define EMC3D_DEFAULT_RATIO 750
 
@@ -64,6 +65,10 @@ static void nvgpu_init_timeout(struct gk20a *g)
 	g->gr_idle_timeout_default = CONFIG_GK20A_DEFAULT_TIMEOUT;
 	if (nvgpu_platform_is_silicon(g))
 		g->timeouts_enabled = true;
+	else if (nvgpu_platform_is_fpga(g)) {
+		g->gr_idle_timeout_default = GK20A_TIMEOUT_FPGA;
+		g->timeouts_enabled = true;
+	}
 }
 
 static void nvgpu_init_timeslice(struct gk20a *g)

drivers/gpu/nvgpu/gk20a/gr_gk20a.h

@@ -42,6 +42,8 @@
 
 #define GK20A_GR_MAX_PES_PER_GPC 3
 
+#define GK20A_TIMEOUT_FPGA		100000 /* 100 sec */
+
 struct channel_gk20a;
 
 enum /* global_ctx_buffer */ {

drivers/gpu/nvgpu/include/nvgpu/soc.h

@@ -17,6 +17,7 @@ struct gk20a;
 
 bool nvgpu_platform_is_silicon(struct gk20a *g);
 bool nvgpu_platform_is_simulation(struct gk20a *g);
+bool nvgpu_platform_is_fpga(struct gk20a *g);
 bool nvgpu_is_hypervisor_mode(struct gk20a *g);
 
 #endif