diff --git a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export index 16fd95399..fdd4b5e34 100644 --- a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export +++ b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export @@ -59,6 +59,13 @@ nvgpu_bitmap_set nvgpu_bsearch nvgpu_gr_alloc nvgpu_gr_free +nvgpu_gr_init +nvgpu_gr_init_support +nvgpu_gr_remove_support +nvgpu_gr_prepare_sw +nvgpu_gr_enable_hw +nvgpu_gr_suspend +nvgpu_gr_falcon_init_ctxsw_ucode nvgpu_gr_config_init nvgpu_gr_config_deinit nvgpu_gr_config_get_max_gpc_count @@ -91,8 +98,6 @@ nvgpu_gr_config_get_sm_info_sm_index nvgpu_gr_config_set_gpc_tpc_mask nvgpu_gr_config_get_gpc_tpc_mask nvgpu_can_busy -nvgpu_gr_prepare_sw -nvgpu_gr_enable_hw nvgpu_channel_alloc_inst nvgpu_channel_cleanup_sw nvgpu_channel_close diff --git a/userspace/required_tests.json b/userspace/required_tests.json index ba5ef94f1..7c543c56b 100644 --- a/userspace/required_tests.json +++ b/userspace/required_tests.json @@ -1429,7 +1429,7 @@ "unit": "nvgpu-pmu" }, { - "test": "init_support", + "test": "gr_init_setup", "test_level": 0, "unit": "nvgpu_gr_config" }, @@ -1454,22 +1454,37 @@ "unit": "nvgpu_gr_config" }, { - "test": "remove_support", + "test": "gr_remove_setup", "test_level": 0, "unit": "nvgpu_gr_config" }, { - "test": "init_support", + "test": "gr_init_setup", "test_level": 0, "unit": "nvgpu_gr_init" }, { - "test": "init_prepare", + "test": "gr_init_prepare", "test_level": 0, "unit": "nvgpu_gr_init" }, { - "test": "remove_support", + "test": "gr_init_support", + "test_level": 0, + "unit": "nvgpu_gr_init" + }, + { + "test": "gr_suspend", + "test_level": 0, + "unit": "nvgpu_gr_init" + }, + { + "test": "gr_remove_support", + "test_level": 0, + "unit": "nvgpu_gr_init" + }, + { + "test": "gr_remove_setup", "test_level": 0, "unit": "nvgpu_gr_init" } diff --git a/userspace/units/gr/config/nvgpu-gr-config.c b/userspace/units/gr/config/nvgpu-gr-config.c index f9f5528c4..73e414fc9 100644 --- a/userspace/units/gr/config/nvgpu-gr-config.c +++ b/userspace/units/gr/config/nvgpu-gr-config.c @@ -41,7 +41,7 @@ static int test_gr_config_init(struct unit_module *m, { unit_gr_config = nvgpu_gr_config_init(g); if (unit_gr_config == NULL) { - return UNIT_FAIL; + unit_return_fail(m, "nvgpu_gr_config_init returned fail\n"); } return UNIT_SUCCESS; @@ -105,56 +105,47 @@ static int test_gr_config_count(struct unit_module *m, val = nvgpu_gr_config_get_max_gpc_count(unit_gr_config); if (val != gv11b_gr_config.max_gpc_count) { - unit_err(m, " mismatch in max_gpc_count\n"); - goto init_fail; + unit_return_fail(m, "mismatch in max_gpc_count\n"); } val = nvgpu_gr_config_get_max_tpc_count(unit_gr_config); if (val != gv11b_gr_config.max_tpc_count) { - unit_err(m, " mismatch in max_tpc_count\n"); - goto init_fail; + unit_return_fail(m, "mismatch in max_tpc_count\n"); } val = nvgpu_gr_config_get_max_tpc_per_gpc_count(unit_gr_config); if (val != gv11b_gr_config.max_tpc_per_gpc_count) { - unit_err(m, " mismatch in max_tpc_per_gpc_count\n"); - goto init_fail; + unit_return_fail(m, "mismatch in max_tpc_per_gpc_count\n"); } val = nvgpu_gr_config_get_gpc_count(unit_gr_config); if (val != gv11b_gr_config.gpc_count) { - unit_err(m, " mismatch in gpc_count\n"); - goto init_fail; + unit_return_fail(m, "mismatch in gpc_count\n"); } val = nvgpu_gr_config_get_tpc_count(unit_gr_config); if (val != gv11b_gr_config.tpc_count) { - unit_err(m, " mismatch in tpc_count\n"); - goto init_fail; + unit_return_fail(m, "mismatch in tpc_count\n"); } val = nvgpu_gr_config_get_ppc_count(unit_gr_config); if (val != gv11b_gr_config.ppc_count) { - unit_err(m, " mismatch in ppc_count\n"); - goto init_fail; + unit_return_fail(m, "mismatch in ppc_count\n"); } val = nvgpu_gr_config_get_pe_count_per_gpc(unit_gr_config); if (val != gv11b_gr_config.pe_count_per_gpc) { - unit_err(m, " mismatch in pe_count_per_gpc\n"); - goto init_fail; + unit_err(m, "mismatch in pe_count_per_gpc\n"); } val = nvgpu_gr_config_get_sm_count_per_tpc(unit_gr_config); if (val != gv11b_gr_config.sm_count_per_tpc) { - unit_err(m, " mismatch in sm_count_per_tpc\n"); - goto init_fail; + unit_err(m, "mismatch in sm_count_per_tpc\n"); } val = nvgpu_gr_config_get_gpc_mask(unit_gr_config); if (val != gv11b_gr_config.gpc_mask) { - unit_err(m, " mismatch in gpc_mask\n"); - goto init_fail; + unit_return_fail(m, "mismatch in gpc_mask\n"); } for (gindex = 0U; gindex < gv11b_gr_config.gpc_count; @@ -162,22 +153,19 @@ static int test_gr_config_count(struct unit_module *m, val = nvgpu_gr_config_get_gpc_ppc_count(unit_gr_config, gindex); if (val != gv11b_gr_config.gpc_ppc_count[gindex]) { - unit_err(m, " mismatch in gpc_ppc_count\n"); - goto init_fail; + unit_return_fail(m, "mismatch in gpc_ppc_count\n"); } val = nvgpu_gr_config_get_gpc_skip_mask(unit_gr_config, gindex); if (val != gv11b_gr_config.gpc_skip_mask[gindex]) { - unit_err(m, " mismatch in gpc_skip_mask\n"); - goto init_fail; + unit_return_fail(m, "mismatch in gpc_skip_mask\n"); } val = nvgpu_gr_config_get_gpc_tpc_count(unit_gr_config, gindex); if (val != gv11b_gr_config.gpc_tpc_count[gindex]) { - unit_err(m, " mismatch in gpc_tpc_count\n"); - goto init_fail; + unit_return_fail(m, "mismatch in gpc_tpc_count\n"); } for (pindex = 0U; pindex < gv11b_gr_config.gpc_count; @@ -187,8 +175,8 @@ static int test_gr_config_count(struct unit_module *m, val = nvgpu_gr_config_get_pes_tpc_count( unit_gr_config, gindex, pindex); if (val != pes_tpc_val) { - unit_err(m, " mismatch in pes_tpc_count\n"); - goto init_fail; + unit_return_fail(m, + "mismatch in pes_tpc_count\n"); } pes_tpc_val = @@ -196,8 +184,8 @@ static int test_gr_config_count(struct unit_module *m, val = nvgpu_gr_config_get_pes_tpc_mask( unit_gr_config, gindex, pindex); if (val != pes_tpc_val) { - unit_err(m, " mismatch in pes_tpc_count\n"); - goto init_fail; + unit_return_fail(m, + "mismatch in pes_tpc_count\n"); } } } @@ -207,20 +195,15 @@ static int test_gr_config_count(struct unit_module *m, */ reg_base = nvgpu_gr_config_get_gpc_tpc_mask_base(unit_gr_config); if (reg_base == NULL) { - unit_err(m, " Invalid gpc_tpc_mask_base\n"); - goto init_fail; + unit_return_fail(m, "Invalid gpc_tpc_mask_base\n"); } reg_base = nvgpu_gr_config_get_gpc_tpc_count_base(unit_gr_config); if (reg_base == NULL) { - unit_err(m, " Invalid gpc_tpc_count_base\n"); - goto init_fail; + unit_return_fail(m, "Invalid gpc_tpc_count_base\n"); } return UNIT_SUCCESS; - -init_fail: - return UNIT_FAIL; } static int test_gr_config_set_get(struct unit_module *m, @@ -238,38 +221,33 @@ static int test_gr_config_set_get(struct unit_module *m, val = (u32)rand(); nvgpu_gr_config_set_no_of_sm(unit_gr_config, val); if (val != nvgpu_gr_config_get_no_of_sm(unit_gr_config)) { - unit_err(m, " mismatch in no_of_sm\n"); - goto set_get_fail; + unit_return_fail(m, "mismatch in no_of_sm\n"); } sm_info = nvgpu_gr_config_get_sm_info(unit_gr_config, 0); val = (u32)rand(); nvgpu_gr_config_set_sm_info_gpc_index(sm_info, val); if (val != nvgpu_gr_config_get_sm_info_gpc_index(sm_info)) { - unit_err(m, " mismatch in sm_info_gindex\n"); - goto set_get_fail; + unit_return_fail(m, "mismatch in sm_info_gindex\n"); } val = (u32)rand(); nvgpu_gr_config_set_sm_info_tpc_index(sm_info, val); if (val != nvgpu_gr_config_get_sm_info_tpc_index(sm_info)) { - unit_err(m, " mismatch in sm_info_tpc_index\n"); - goto set_get_fail; + unit_return_fail(m, "mismatch in sm_info_tpc_index\n"); } val = (u32)rand(); nvgpu_gr_config_set_sm_info_global_tpc_index(sm_info, val); if (val != nvgpu_gr_config_get_sm_info_global_tpc_index(sm_info)) { - unit_err(m, " mismatch in sm_info_global_tpc_index\n"); - goto set_get_fail; + unit_return_fail(m, "mismatch in sm_info_global_tpc_index\n"); } val = (u32)rand(); nvgpu_gr_config_set_sm_info_sm_index(sm_info, val); if (val != nvgpu_gr_config_get_sm_info_sm_index(sm_info)) { - unit_err(m, " mismatch in sm_info_sm_index\n"); - goto set_get_fail; + unit_return_fail(m, "mismatch in sm_info_sm_index\n"); } for (gindex = 0U; gindex < unit_gr_config->gpc_count; @@ -278,24 +256,20 @@ static int test_gr_config_set_get(struct unit_module *m, nvgpu_gr_config_set_gpc_tpc_mask(unit_gr_config, gindex, val); if (val != nvgpu_gr_config_get_gpc_tpc_mask(unit_gr_config, gindex)) { - unit_err(m, " mismatch in gpc_tpc_mask\n"); - goto set_get_fail; + unit_return_fail(m, "mismatch in gpc_tpc_mask\n"); } } return UNIT_SUCCESS; - -set_get_fail: - return UNIT_FAIL; } struct unit_module_test nvgpu_gr_config_tests[] = { - UNIT_TEST(init_support, test_gr_init_support, NULL, 0), + UNIT_TEST(gr_init_setup, test_gr_init_setup, NULL, 0), UNIT_TEST(config_init, test_gr_config_init, NULL, 0), UNIT_TEST(config_check_init, test_gr_config_count, NULL, 0), UNIT_TEST(config_check_set_get, test_gr_config_set_get, NULL, 0), UNIT_TEST(config_deinit, test_gr_config_deinit, NULL, 0), - UNIT_TEST(remove_support, test_gr_remove_support, NULL, 0), + UNIT_TEST(gr_remove_setup, test_gr_remove_setup, NULL, 0), }; UNIT_MODULE(nvgpu_gr_config, nvgpu_gr_config_tests, UNIT_PRIO_NVGPU_TEST); diff --git a/userspace/units/gr/init/nvgpu-gr-init.c b/userspace/units/gr/init/nvgpu-gr-init.c index 358e79906..683df6e45 100644 --- a/userspace/units/gr/init/nvgpu-gr-init.c +++ b/userspace/units/gr/init/nvgpu-gr-init.c @@ -35,9 +35,12 @@ #include "../nvgpu-gr.h" struct unit_module_test nvgpu_gr_init_tests[] = { - UNIT_TEST(init_support, test_gr_init_support, NULL, 0), - UNIT_TEST(init_prepare, test_gr_init_prepare, NULL, 0), - UNIT_TEST(remove_support, test_gr_remove_support, NULL, 0), + UNIT_TEST(gr_init_setup, test_gr_init_setup, NULL, 0), + UNIT_TEST(gr_init_prepare, test_gr_init_prepare, NULL, 0), + UNIT_TEST(gr_init_support, test_gr_init_support, NULL, 0), + UNIT_TEST(gr_suspend, test_gr_suspend, NULL, 0), + UNIT_TEST(gr_remove_support, test_gr_remove_support, NULL, 0), + UNIT_TEST(gr_remove_setup, test_gr_remove_setup, NULL, 0), }; UNIT_MODULE(nvgpu_gr_init, nvgpu_gr_init_tests, UNIT_PRIO_NVGPU_TEST); diff --git a/userspace/units/gr/libnvgpu-gr.export b/userspace/units/gr/libnvgpu-gr.export index f11302967..81d19894c 100644 --- a/userspace/units/gr/libnvgpu-gr.export +++ b/userspace/units/gr/libnvgpu-gr.export @@ -20,7 +20,10 @@ # DEALINGS IN THE SOFTWARE. # -test_gr_init_support -test_gr_remove_support +test_gr_init_setup +test_gr_remove_setup test_gr_init_prepare +test_gr_init_support +test_gr_suspend +test_gr_remove_support diff --git a/userspace/units/gr/nvgpu-gr-gv11b-regs.h b/userspace/units/gr/nvgpu-gr-gv11b-regs.h index 5dcf6ff49..5fe8b9dc9 100644 --- a/userspace/units/gr/nvgpu-gr-gv11b-regs.h +++ b/userspace/units/gr/nvgpu-gr-gv11b-regs.h @@ -24,14 +24,10 @@ #define UNIT_NVGPU_GR_GV11b_REGS_H #include -#include +#include #include -#include -#include - #include - u32 gr_gv11b_priv_ring_regs[] = { /* 0x00120060 */ 0x00000000, 0x00000cd7, 0xbadf5040, 0x00000000, /* 0x00120070 */ 0x00000001, 0x00000001, 0x00000001, 0x00000000, @@ -3281,5 +3277,4 @@ struct nvgpu_posix_io_reg_space gr_gv11b_initialized_reg_space[] = { .data = gr_gv11b_fs_regs, }, }; - #endif /* UNIT_NVGPU_GR_GV11B_REGS_H */ diff --git a/userspace/units/gr/nvgpu-gr-gv11b.c b/userspace/units/gr/nvgpu-gr-gv11b.c index 7ca769c28..e659e97a8 100644 --- a/userspace/units/gr/nvgpu-gr-gv11b.c +++ b/userspace/units/gr/nvgpu-gr-gv11b.c @@ -21,7 +21,7 @@ */ #include -#include +#include #include #include #include @@ -41,6 +41,7 @@ #define NV_PBB_FBHUB_REGSPACE 0x100B00 #define NV_PRI_GPCCS_PPCS_PES_VSC_VPC_REGSPACE 0x41BE04 +#define NV_PRI_GPCCS_PPC0_PES_REGSPACE 0x503010 /* * Mock I/O */ @@ -187,6 +188,26 @@ int test_gr_setup_gv11b_reg_space(struct unit_module *m, struct gk20a *g) goto clean_up_gcc_tpcs_space; } + /* + * PRI_GPCS_PPC0 reg space + * + */ + if (nvgpu_posix_io_add_reg_space(g, + NV_PRI_GPCCS_PPC0_PES_REGSPACE, 0x2FFF) != 0) { + unit_err(m, "Add gpcs ppc0 pes reg space failed!\n"); + goto clean_up_gcc_ppcs_space; + } + + /* + * PRI_GPCS_GPM reg space + * + */ + if (nvgpu_posix_io_add_reg_space(g, + gr_gpc0_gpm_pd_sm_id_r(0), 0x10) != 0) { + unit_err(m, "Add gpcs gpm reg space failed!\n"); + goto clean_up_gcc_ppc0_space; + } + /* * FB partition reg space * @@ -194,7 +215,7 @@ int test_gr_setup_gv11b_reg_space(struct unit_module *m, struct gk20a *g) if (nvgpu_posix_io_add_reg_space(g, NV_PBB_FBHUB_REGSPACE, 0x1FF) != 0) { unit_err(m, "Add fbhub reg space failed!\n"); - goto clean_up_gcc_ppcs_space; + goto clean_up_gcc_gpm_space; } /* @@ -213,8 +234,12 @@ int test_gr_setup_gv11b_reg_space(struct unit_module *m, struct gk20a *g) clean_up_fbhub_space: nvgpu_posix_io_delete_reg_space(g, NV_PBB_FBHUB_REGSPACE); +clean_up_gcc_gpm_space: + nvgpu_posix_io_delete_reg_space(g, gr_gpc0_gpm_pd_sm_id_r(0)); +clean_up_gcc_ppc0_space: + nvgpu_posix_io_delete_reg_space(g, NV_PRI_GPCCS_PPC0_PES_REGSPACE); clean_up_gcc_ppcs_space: - nvgpu_posix_io_delete_reg_space(g, gr_gpcs_tpcs_pes_vsc_vpc_r()); + nvgpu_posix_io_delete_reg_space(g, NV_PRI_GPCCS_PPCS_PES_VSC_VPC_REGSPACE); clean_up_gcc_tpcs_space: nvgpu_posix_io_delete_reg_space(g, gr_gpcs_tpcs_pe_vaf_r()); clean_up_gcc_space: @@ -229,7 +254,9 @@ clean_up_reg_space: void test_gr_cleanup_gv11b_reg_space(struct unit_module *m, struct gk20a *g) { nvgpu_posix_io_delete_reg_space(g, NV_PBB_FBHUB_REGSPACE); - nvgpu_posix_io_delete_reg_space(g, gr_gpcs_tpcs_pes_vsc_vpc_r()); + nvgpu_posix_io_delete_reg_space(g, gr_gpc0_gpm_pd_sm_id_r(0)); + nvgpu_posix_io_delete_reg_space(g, NV_PRI_GPCCS_PPC0_PES_REGSPACE); + nvgpu_posix_io_delete_reg_space(g, NV_PRI_GPCCS_PPCS_PES_VSC_VPC_REGSPACE); nvgpu_posix_io_delete_reg_space(g, gr_gpcs_tpcs_pe_vaf_r()); nvgpu_posix_io_delete_reg_space(g, gr_pri_gpcs_gcc_dbg_r()); nvgpu_posix_io_delete_reg_space(g, gr_gpcs_swdx_dss_zbc_color_r_r(0)); diff --git a/userspace/units/gr/nvgpu-gr.c b/userspace/units/gr/nvgpu-gr.c index cdc444d8f..25d7c8966 100644 --- a/userspace/units/gr/nvgpu-gr.c +++ b/userspace/units/gr/nvgpu-gr.c @@ -29,13 +29,16 @@ #include #include #include +#include + +#include "common/gr/gr_falcon_priv.h" #include "hal/init/hal_gv11b.h" #include "nvgpu-gr.h" #include "nvgpu-gr-gv11b.h" -int test_gr_init_support(struct unit_module *m, struct gk20a *g, void *args) +int test_gr_init_setup(struct unit_module *m, struct gk20a *g, void *args) { int err; @@ -51,7 +54,7 @@ int test_gr_init_support(struct unit_module *m, struct gk20a *g, void *args) */ err = nvgpu_gr_alloc(g); if (err != 0) { - unit_err(m, " Gr allocation failed!\n"); + unit_err(m, "Gr allocation failed\n"); return -ENOMEM; } @@ -61,28 +64,72 @@ fail: return UNIT_FAIL; } +static int test_gr_falcon_load_ctxsw_ucode(struct gk20a *g, + struct nvgpu_gr_falcon *falcon) +{ + int err = 0; + err = nvgpu_gr_falcon_init_ctxsw_ucode(g, falcon); + if (err == 0) { + falcon->skip_ucode_init = true; + } + + return err; +} + int test_gr_init_prepare(struct unit_module *m, struct gk20a *g, void *args) { int err; err = nvgpu_gr_prepare_sw(g); - if (err) { - goto prep_fail; + if (err != 0) { + unit_return_fail(m, "nvgpu_gr_prepare_sw returned fail\n"); } err = nvgpu_gr_enable_hw(g); - if (err) { - goto prep_fail; + if (err != 0) { + unit_return_fail(m, "nvgpu_gr_enable_hw returned fail\n"); } return UNIT_SUCCESS; - -prep_fail: - return UNIT_FAIL; - } -int test_gr_remove_support(struct unit_module *m, +int test_gr_init_support(struct unit_module *m, struct gk20a *g, void *args) +{ + int err; + + nvgpu_gr_init(g); + + g->ops.ltc.init_ltc_support(g); + g->ops.mm.init_mm_support(g); + + /* over-ride the falcon load_ctxsw_ucode */ + g->ops.gr.falcon.load_ctxsw_ucode = test_gr_falcon_load_ctxsw_ucode; + + err = nvgpu_gr_init_support(g); + if (err != 0) { + unit_return_fail(m, "nvgpu_gr_init_support returned fail\n"); + } + + return UNIT_SUCCESS; +} + +int test_gr_suspend(struct unit_module *m, struct gk20a *g, void *args) +{ + if (nvgpu_gr_suspend(g) != 0) { + unit_return_fail(m, "nvgpu_gr_suspend returned fail\n"); + } + + return UNIT_SUCCESS; +} + +int test_gr_remove_support(struct unit_module *m, struct gk20a *g, void *args) +{ + nvgpu_gr_remove_support(g); + + return UNIT_SUCCESS; +} + +int test_gr_remove_setup(struct unit_module *m, struct gk20a *g, void *args) { test_gr_cleanup_gv11b_reg_space(m, g); diff --git a/userspace/units/gr/nvgpu-gr.h b/userspace/units/gr/nvgpu-gr.h index 965494a3b..5345f4e39 100644 --- a/userspace/units/gr/nvgpu-gr.h +++ b/userspace/units/gr/nvgpu-gr.h @@ -24,21 +24,43 @@ #include -#ifdef UNIT_GR_DEBUG -#define unit_verbose unit_info -#else -#define unit_verbose(unit, msg, ...) \ - do { \ - if (0) \ - { unit_info(unit, msg, ##__VA_ARGS__); \ - } \ - } while (0) -#endif +struct gk20a; +struct unit_module; -int test_gr_init_support(struct unit_module *m, - struct gk20a *g, void *args); -int test_gr_remove_support(struct unit_module *m, - struct gk20a *g, void *args); -int test_gr_init_prepare(struct unit_module *m, - struct gk20a *g, void *args); +/** + * Allocate and add needed register spaces + * Initialize gv11b hal + * Allocate memory for gr unit + */ +int test_gr_init_setup(struct unit_module *m, struct gk20a *g, void *args); + +/** + * Delete the memory for gr unit + * Delete and remove the register spaces + */ +int test_gr_remove_setup(struct unit_module *m, struct gk20a *g, void *args); + +/** + * call init_prepare functions to GR driver for + * nvgpu_gr_prepare_sw and nvgpu_gr_enable_hw + */ +int test_gr_init_prepare(struct unit_module *m, struct gk20a *g, void *args); + +/** + * Override falcon.load_ctxsw_ucode hal and call + * nvgpu_gr_falcon_init_ctxsw_ucode. + * Initialize ltc and mm units + * Call nvgpu_gr_init_support driver function + */ +int test_gr_init_support(struct unit_module *m, struct gk20a *g, void *args); + +/** + * Support nvgpu_gr_suspend driver function + */ +int test_gr_suspend(struct unit_module *m, struct gk20a *g, void *args); + +/** + * Support nvgpu_gr_remove_support driver function + */ +int test_gr_remove_support(struct unit_module *m, struct gk20a *g, void *args); #endif /* UNIT_NVGPU_GR_H */