gpu: nvgpu: Unify querying stream id

Stream ID for gp10b is retrieved directly from DT headers in common
code. Introduce instead a variable to store the stream ID and move the
query to platform_gp10b_tegra.c.

JIRA NVGPU-4

Change-Id: I123024e13e470283bb691883f8f963eb72c997d8
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1648013
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2018-01-29 08:40:24 -08:00
committed by mobile promotions
parent 6e5a3451d4
commit cb9f8bae1a
5 changed files with 17 additions and 3 deletions

View File

@@ -170,6 +170,13 @@ static void nvgpu_init_vbios_vars(struct gk20a *g)
g->vbios_min_version = platform->vbios_min_version; g->vbios_min_version = platform->vbios_min_version;
} }
static void nvgpu_init_ltc_vars(struct gk20a *g)
{
struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
g->ltc_streamid = platform->ltc_streamid;
}
static void nvgpu_init_mm_vars(struct gk20a *g) static void nvgpu_init_mm_vars(struct gk20a *g)
{ {
struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g)); struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
@@ -202,6 +209,7 @@ int nvgpu_probe(struct gk20a *g,
nvgpu_init_timeslice(g); nvgpu_init_timeslice(g);
nvgpu_init_pm_vars(g); nvgpu_init_pm_vars(g);
nvgpu_init_vbios_vars(g); nvgpu_init_vbios_vars(g);
nvgpu_init_ltc_vars(g);
/* Initialize the platform interface. */ /* Initialize the platform interface. */
err = platform->probe(dev); err = platform->probe(dev);

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@@ -239,6 +239,9 @@ struct gk20a_platform {
u32 ina3221_dcb_index; u32 ina3221_dcb_index;
u32 ina3221_i2c_address; u32 ina3221_i2c_address;
u32 ina3221_i2c_port; u32 ina3221_i2c_port;
/* stream id to use */
u32 ltc_streamid;
}; };
static inline struct gk20a_platform *gk20a_get_platform( static inline struct gk20a_platform *gk20a_get_platform(

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@@ -25,6 +25,8 @@
#include <soc/tegra/tegra_bpmp.h> #include <soc/tegra/tegra_bpmp.h>
#include <soc/tegra/tegra_powergate.h> #include <soc/tegra/tegra_powergate.h>
#include <dt-bindings/memory/tegra-swgroup.h>
#include <nvgpu/kmem.h> #include <nvgpu/kmem.h>
#include <nvgpu/bug.h> #include <nvgpu/bug.h>
#include <nvgpu/enabled.h> #include <nvgpu/enabled.h>
@@ -417,6 +419,8 @@ struct gk20a_platform gp10b_tegra_platform = {
.soc_name = "tegra18x", .soc_name = "tegra18x",
.unified_memory = true, .unified_memory = true,
.ltc_streamid = TEGRA_SID_GPUB,
}; };

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@@ -1304,6 +1304,7 @@ struct gk20a {
int irq_nonstall; int irq_nonstall;
u32 max_ltc_count; u32 max_ltc_count;
u32 ltc_count; u32 ltc_count;
u32 ltc_streamid;
struct gk20a_channel_worker { struct gk20a_channel_worker {
struct nvgpu_thread poll_task; struct nvgpu_thread poll_task;

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@@ -24,8 +24,6 @@
#include <trace/events/gk20a.h> #include <trace/events/gk20a.h>
#include <dt-bindings/memory/tegra-swgroup.h>
#include <nvgpu/ltc.h> #include <nvgpu/ltc.h>
#include <nvgpu/log.h> #include <nvgpu/log.h>
#include <nvgpu/enabled.h> #include <nvgpu/enabled.h>
@@ -299,7 +297,7 @@ void gp10b_ltc_init_fs_state(struct gk20a *g)
gm20b_ltc_init_fs_state(g); gm20b_ltc_init_fs_state(g);
gk20a_writel(g, ltc_ltca_g_axi_pctrl_r(), gk20a_writel(g, ltc_ltca_g_axi_pctrl_r(),
ltc_ltca_g_axi_pctrl_user_sid_f(TEGRA_SID_GPUB)); ltc_ltca_g_axi_pctrl_user_sid_f(g->ltc_streamid));
/* Enable ECC interrupts */ /* Enable ECC interrupts */
ltc_intr = gk20a_readl(g, ltc_ltcs_ltss_intr_r()); ltc_intr = gk20a_readl(g, ltc_ltcs_ltss_intr_r());