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gpu: nvgpu: voltage changes

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- added voltage interface & ctrl defines.

JIRA DNVGPU-122

Change-Id: Ia1a4c655c3c5faa638cafcdc75bdfb0e3c3be54f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1222775
(cherry picked from commit 46ff4d54d3cc02d9f039091f09eea09a5d6c22ce)
Reviewed-on: http://git-master/r/1244654
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2016-09-19 10:59:54 +05:30
committed by mobile promotions
parent 4f26dbc51e
commit cc438a3609
4 changed files with 385 additions and 16 deletions
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89
drivers/gpu/nvgpu/ctrl/ctrlvolt.h
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@@ -15,17 +15,94 @@
#ifndef _ctrlvolt_h_
#define _ctrlvolt_h_
#define CTRL_VOLT_VOLT_RAIL_MAX_RAILS \
#define CTRL_VOLT_VOLT_RAIL_MAX_RAILS \
CTRL_BOARDOBJGRP_E32_MAX_OBJECTS
#include "ctrlperf.h"
#include "ctrlboardobj.h"
#define CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES 0x04
#define CTRL_VOLT_VOLT_DEV_VID_VSEL_MAX_ENTRIES (8)
#define CTRL_VOLT_DOMAIN_INVALID 0x00
#define CTRL_VOLT_DOMAIN_LOGIC 0x01
#define CLK_PROG_VFE_ENTRY_LOGIC 0x00
#define CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES 0x04
#define CTRL_VOLT_VOLT_DEV_VID_VSEL_MAX_ENTRIES (8)
#define CTRL_VOLT_DOMAIN_INVALID 0x00
#define CTRL_VOLT_DOMAIN_LOGIC 0x01
#define CLK_PROG_VFE_ENTRY_LOGIC 0x00
/*
* Macros for Voltage Domain HAL.
*/
#define CTRL_VOLT_DOMAIN_HAL_GP10X_SINGLE_RAIL 0x00
#define CTRL_VOLT_DOMAIN_HAL_GP10X_SPLIT_RAIL 0x01
/*
* Macros for Voltage Domains.
*/
#define CTRL_VOLT_DOMAIN_INVALID 0x00
#define CTRL_VOLT_DOMAIN_LOGIC 0x01
#define CTRL_VOLT_DOMAIN_SRAM 0x02
/*!
* Special value corresponding to an invalid Voltage Rail Index.
*/
#define CTRL_VOLT_RAIL_INDEX_INVALID \
CTRL_BOARDOBJ_IDX_INVALID
/*!
* Special value corresponding to an invalid Voltage Device Index.
*/
#define CTRL_VOLT_DEVICE_INDEX_INVALID \
CTRL_BOARDOBJ_IDX_INVALID
/*!
* Special value corresponding to an invalid Voltage Policy Index.
*/
#define CTRL_VOLT_POLICY_INDEX_INVALID \
CTRL_BOARDOBJ_IDX_INVALID
enum nv_pmu_pmgr_pwm_source {
NV_PMU_PMGR_PWM_SOURCE_INVALID = 0,
NV_PMU_PMGR_PWM_SOURCE_THERM_VID_PWM_1 = 5,
NV_PMU_PMGR_PWM_SOURCE_RSVD_0 = 7,
NV_PMU_PMGR_PWM_SOURCE_RSVD_1 = 8,
};
/*!
* Macros for Voltage Device Types.
*/
#define CTRL_VOLT_DEVICE_TYPE_INVALID 0x00
#define CTRL_VOLT_DEVICE_TYPE_PWM 0x03
/*
* Macros for Volt Device Operation types.
*/
#define CTRL_VOLT_DEVICE_OPERATION_TYPE_INVALID 0x00
#define CTRL_VOLT_DEVICE_OPERATION_TYPE_DEFAULT 0x01
#define CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_STEADY_STATE 0x02
#define CTRL_VOLT_DEVICE_OPERATION_TYPE_LPWR_SLEEP_STATE 0x03
/*!
* Macros for Voltage Domains.
*/
#define CTRL_VOLT_DOMAIN_INVALID 0x00
#define CTRL_VOLT_DOMAIN_LOGIC 0x01
#define CTRL_VOLT_DOMAIN_SRAM 0x02
/*!
* Macros for Volt Policy types.
*
* Virtual VOLT_POLICY types are indexed starting from 0xFF.
*/
#define CTRL_VOLT_POLICY_TYPE_INVALID 0x00
#define CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL 0x01
#define CTRL_VOLT_POLICY_TYPE_SR_MULTI_STEP 0x02
#define CTRL_VOLT_POLICY_TYPE_SR_SINGLE_STEP 0x03
#define CTRL_VOLT_POLICY_TYPE_SPLIT_RAIL 0xFE
#define CTRL_VOLT_POLICY_TYPE_UNKNOWN 0xFF
/*!
* Macros for Volt Policy Client types.
*/
#define CTRL_VOLT_POLICY_CLIENT_INVALID 0x00
#define CTRL_VOLT_POLICY_CLIENT_PERF_CORE_VF_SEQ 0x01
struct ctrl_volt_volt_rail_list_item {
u8 rail_idx;