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gpu: nvgpu: gm20b: Store LTC configuration

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Change-Id: Ia780e6a7cb3579f0d6ed2dca9949a349799535fd
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/448115
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Arto Merilainen
2014-07-28 15:58:13 +03:00
committed by Dan Willemsen
parent 8554e9a9c8
commit ccead861f2
3 changed files with 6 additions and 2 deletions
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2
drivers/gpu/nvgpu/gk20a/gr_gk20a.h
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@@ -211,7 +211,7 @@ struct gr_gk20a {
u32 num_fbps;
u32 comptags_per_cacheline;
u32 slices_per_fbp;
u32 slices_per_ltc;
u32 cacheline_size;
u32 max_gpc_count;

2
drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
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@@ -96,7 +96,7 @@ static int gk20a_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr)
1); /* align */
gr->comptags_per_cacheline = comptags_per_cacheline;
gr->slices_per_fbp = slices_per_fbp;
gr->slices_per_ltc = slices_per_fbp / g->ltc_count;
gr->cacheline_size = cacheline_size;
return 0;

4
drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
View File

@@ -95,6 +95,10 @@ static int gm20b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr)
max_comptag_lines - 1, /* length*/
1); /* align */
gr->comptags_per_cacheline = comptags_per_cacheline;
gr->slices_per_ltc = slices_per_ltc;
gr->cacheline_size = cacheline_size;
return 0;
}