diff --git a/arch/nvgpu-hal-new.yaml b/arch/nvgpu-hal-new.yaml
index a1defa335..4dfe395c8 100644
--- a/arch/nvgpu-hal-new.yaml
+++ b/arch/nvgpu-hal-new.yaml
@@ -536,21 +536,25 @@ fb:
              hal/fb/intr/fb_intr_ecc_gv11b_fusa.c,
              hal/fb/intr/fb_intr_tu104.c, hal/fb/intr/fb_intr_tu104.h ]
 
-pmu:
+pmu_fusa:
   safe: yes
   owner: Mahantesh K
+  sources: [ hal/pmu/pmu_gp106_fusa.c,
+             hal/pmu/pmu_gp106.h,
+             hal/pmu/pmu_gv11b_fusa.c,
+             hal/pmu/pmu_gv11b.h ]
+
+pmu:
+  safe: no
+  owner: Mahantesh K
   sources: [ hal/pmu/pmu_gk20a.c,
              hal/pmu/pmu_gk20a.h,
              hal/pmu/pmu_gm20b.c,
              hal/pmu/pmu_gm20b.h,
              hal/pmu/pmu_gp106.c,
-             hal/pmu/pmu_gp106_fusa.c,
-             hal/pmu/pmu_gp106.h,
              hal/pmu/pmu_gp10b.c,
              hal/pmu/pmu_gp10b.h,
              hal/pmu/pmu_gv11b.c,
-             hal/pmu/pmu_gv11b_fusa.c,
-             hal/pmu/pmu_gv11b.h,
              hal/pmu/pmu_tu104.c,
              hal/pmu/pmu_tu104.h ]
 
diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources
index e459563ec..d9fadef1f 100644
--- a/drivers/gpu/nvgpu/Makefile.sources
+++ b/drivers/gpu/nvgpu/Makefile.sources
@@ -165,8 +165,7 @@ srcs += common/utils/enabled.c \
 	hal/fifo/pbdma_gp10b.c \
 	hal/fifo/userd_gk20a.c \
 	hal/fifo/mmu_fault_gp10b.c \
-	hal/sync/syncpt_cmdbuf_gv11b.c \
-	hal/pmu/pmu_gv11b.c
+	hal/sync/syncpt_cmdbuf_gv11b.c
 
 # Source files below are functionaly safe (FuSa) and must always be included.
 srcs += hal/mm/mm_gv11b_fusa.c \
@@ -314,6 +313,7 @@ srcs += hal/init/hal_gp10b.c \
 	hal/netlist/netlist_gp10b.c \
 	hal/sync/syncpt_cmdbuf_gk20a.c \
 	hal/pmu/pmu_gp106.c \
+	hal/pmu/pmu_gv11b.c \
 	hal/top/top_gm20b.c \
 	hal/top/top_gp106.c
 endif
diff --git a/drivers/gpu/nvgpu/hal/pmu/pmu_gv11b.c b/drivers/gpu/nvgpu/hal/pmu/pmu_gv11b.c
index 0a158c373..c7301b9be 100644
--- a/drivers/gpu/nvgpu/hal/pmu/pmu_gv11b.c
+++ b/drivers/gpu/nvgpu/hal/pmu/pmu_gv11b.c
@@ -39,15 +39,6 @@
 
 #define ALIGN_4KB     12
 
-int gv11b_pmu_inject_ecc_error(struct gk20a *g,
-		struct nvgpu_hw_err_inject_info *err, u32 error_info)
-{
-	nvgpu_info(g, "Injecting PMU fault %s", err->name);
-	nvgpu_writel(g, err->get_reg_addr(), err->get_reg_val(1U));
-
-	return 0;
-}
-
 #ifdef CONFIG_NVGPU_LS_PMU
 /* PROD settings for ELPG sequencing registers*/
 static struct pg_init_sequence_list _pginitseq_gv11b[] = {
diff --git a/drivers/gpu/nvgpu/hal/pmu/pmu_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/pmu/pmu_gv11b_fusa.c
index ccde2ad4c..ea5480b09 100644
--- a/drivers/gpu/nvgpu/hal/pmu/pmu_gv11b_fusa.c
+++ b/drivers/gpu/nvgpu/hal/pmu/pmu_gv11b_fusa.c
@@ -39,6 +39,15 @@
 
 #define ALIGN_4KB     12
 
+int gv11b_pmu_inject_ecc_error(struct gk20a *g,
+		struct nvgpu_hw_err_inject_info *err, u32 error_info)
+{
+	nvgpu_info(g, "Injecting PMU fault %s", err->name);
+	nvgpu_writel(g, err->get_reg_addr(), err->get_reg_val(1U));
+
+	return 0;
+}
+
 static inline u32 pmu_falcon_ecc_control_r(void)
 {
 	return pwr_pmu_falcon_ecc_control_r();