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gpu: nvgpu: modify gmmu page table entry functions
Move below chip agnostic gmmu pte functions to common/mm/gmmu/pte.c. - gmmu_aperture_mask() - pte_dbg_print() Default big page size for all chips is 64K. So, move gp10b_mm_get_default_big_page_size() to common file and rename as nvgpu_gmmu_default_big_page_size(). Modify gv11b_gpu_phys_addr() to use get_iommu_bit() hal. JIRA NVGPU-4666 Change-Id: I512c42723faf2d03e5b367879c9c385dcf52cdc2 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2329560 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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committed by
Alex Waterman
parent
05df07945a
commit
cd7194cbc0
@@ -73,7 +73,7 @@ static struct vm_gk20a *init_vm_env(struct unit_module *m, struct gk20a *g,
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/* Minimum HALs for vm_init */
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g->ops.mm.gmmu.get_default_big_page_size =
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gp10b_mm_get_default_big_page_size;
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nvgpu_gmmu_default_big_page_size;
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g->ops.mm.gmmu.get_mmu_levels = gp10b_mm_get_mmu_levels;
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g->ops.mm.gmmu.get_max_page_table_levels = gp10b_get_max_page_table_levels;
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