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gpu: nvgpu: move cycle state buffer handler to linux
We use dma_buf pointer cyclestate_buffer_handler in common code But since this is linux specific, we need to move this out of common code and into linux specific code Move dma_buf pointer cyclestate_buffer_handler from common channel code to struct nvgpu_channel_linux Fix all pointer accesses to this handle Move gk20a_channel_free_cycle_stats_buffer() to ioctl_channel.c since it is mostly linux specific And since gk20a_channel_free_cycle_stats_buffer() needs to be called while closing the channel, call it from nvgpu_channel_close_linux() Jira NVGPU-397 Jira NVGPU-415 Change-Id: Ifb429e49b8f7a1c9e2bc757f3efdd50b28ceca1f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1603909 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -245,6 +245,7 @@ static void nvgpu_channel_close_linux(struct channel_gk20a *ch)
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nvgpu_channel_work_completion_clear(ch);
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#if defined(CONFIG_GK20A_CYCLE_STATS)
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gk20a_channel_free_cycle_stats_buffer(ch);
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gk20a_channel_free_cycle_stats_snapshot(ch);
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#endif
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}
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@@ -17,6 +17,7 @@
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#define __NVGPU_CHANNEL_H__
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#include <linux/workqueue.h>
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#include <linux/dma-buf.h>
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#include <nvgpu/types.h>
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@@ -56,6 +57,8 @@ struct nvgpu_channel_linux {
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struct nvgpu_channel_completion_cb completion_cb;
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struct nvgpu_error_notifier error_notifier;
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struct dma_buf *cyclestate_buffer_handler;
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};
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int nvgpu_init_channel_support_linux(struct nvgpu_os_linux *l);
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@@ -102,17 +102,35 @@ struct channel_priv {
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#if defined(CONFIG_GK20A_CYCLE_STATS)
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void gk20a_channel_free_cycle_stats_buffer(struct channel_gk20a *ch)
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{
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struct nvgpu_channel_linux *priv = ch->os_priv;
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/* disable existing cyclestats buffer */
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nvgpu_mutex_acquire(&ch->cyclestate.cyclestate_buffer_mutex);
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if (priv->cyclestate_buffer_handler) {
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dma_buf_vunmap(priv->cyclestate_buffer_handler,
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ch->cyclestate.cyclestate_buffer);
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dma_buf_put(priv->cyclestate_buffer_handler);
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priv->cyclestate_buffer_handler = NULL;
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ch->cyclestate.cyclestate_buffer = NULL;
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ch->cyclestate.cyclestate_buffer_size = 0;
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}
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nvgpu_mutex_release(&ch->cyclestate.cyclestate_buffer_mutex);
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}
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static int gk20a_channel_cycle_stats(struct channel_gk20a *ch,
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struct nvgpu_cycle_stats_args *args)
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{
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struct dma_buf *dmabuf;
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void *virtual_address;
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struct nvgpu_channel_linux *priv = ch->os_priv;
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/* is it allowed to handle calls for current GPU? */
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if (!nvgpu_is_enabled(ch->g, NVGPU_SUPPORT_CYCLE_STATS))
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return -ENOSYS;
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if (args->dmabuf_fd && !ch->cyclestate.cyclestate_buffer_handler) {
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if (args->dmabuf_fd && !priv->cyclestate_buffer_handler) {
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/* set up new cyclestats buffer */
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dmabuf = dma_buf_get(args->dmabuf_fd);
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@@ -122,18 +140,16 @@ static int gk20a_channel_cycle_stats(struct channel_gk20a *ch,
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if (!virtual_address)
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return -ENOMEM;
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ch->cyclestate.cyclestate_buffer_handler = dmabuf;
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priv->cyclestate_buffer_handler = dmabuf;
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ch->cyclestate.cyclestate_buffer = virtual_address;
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ch->cyclestate.cyclestate_buffer_size = dmabuf->size;
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return 0;
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} else if (!args->dmabuf_fd &&
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ch->cyclestate.cyclestate_buffer_handler) {
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} else if (!args->dmabuf_fd && priv->cyclestate_buffer_handler) {
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gk20a_channel_free_cycle_stats_buffer(ch);
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return 0;
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} else if (!args->dmabuf_fd &&
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!ch->cyclestate.cyclestate_buffer_handler) {
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} else if (!args->dmabuf_fd && !priv->cyclestate_buffer_handler) {
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/* no requst from GL */
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return 0;
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@@ -37,6 +37,7 @@ int gk20a_channel_open_ioctl(struct gk20a *g,
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struct nvgpu_channel_open_args *args);
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int gk20a_channel_free_cycle_stats_snapshot(struct channel_gk20a *ch);
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void gk20a_channel_free_cycle_stats_buffer(struct channel_gk20a *ch);
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extern const struct file_operations gk20a_event_id_ops;
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extern const struct file_operations gk20a_channel_ops;
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@@ -360,24 +360,6 @@ static void gk20a_wait_until_counter_is_N(
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}
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}
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#if defined(CONFIG_GK20A_CYCLE_STATS)
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void gk20a_channel_free_cycle_stats_buffer(struct channel_gk20a *ch)
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{
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/* disable existing cyclestats buffer */
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nvgpu_mutex_acquire(&ch->cyclestate.cyclestate_buffer_mutex);
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if (ch->cyclestate.cyclestate_buffer_handler) {
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dma_buf_vunmap(ch->cyclestate.cyclestate_buffer_handler,
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ch->cyclestate.cyclestate_buffer);
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dma_buf_put(ch->cyclestate.cyclestate_buffer_handler);
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ch->cyclestate.cyclestate_buffer_handler = NULL;
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ch->cyclestate.cyclestate_buffer = NULL;
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ch->cyclestate.cyclestate_buffer_size = 0;
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}
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nvgpu_mutex_release(&ch->cyclestate.cyclestate_buffer_mutex);
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}
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#endif
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/* call ONLY when no references to the channel exist: after the last put */
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static void gk20a_free_channel(struct channel_gk20a *ch, bool force)
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{
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@@ -490,10 +472,6 @@ static void gk20a_free_channel(struct channel_gk20a *ch, bool force)
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nvgpu_big_free(g, ch->gpfifo.pipe);
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memset(&ch->gpfifo, 0, sizeof(struct gpfifo_desc));
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#if defined(CONFIG_GK20A_CYCLE_STATS)
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gk20a_channel_free_cycle_stats_buffer(ch);
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#endif
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channel_gk20a_free_priv_cmdbuf(ch);
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/* sync must be destroyed before releasing channel vm */
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@@ -255,7 +255,6 @@ struct channel_gk20a {
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struct {
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void *cyclestate_buffer;
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u32 cyclestate_buffer_size;
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struct dma_buf *cyclestate_buffer_handler;
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struct nvgpu_mutex cyclestate_buffer_mutex;
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} cyclestate;
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@@ -370,7 +369,6 @@ int gk20a_channel_alloc_gpfifo(struct channel_gk20a *c,
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unsigned int num_entries,
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unsigned int num_inflight_jobs,
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u32 flags);
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void gk20a_channel_free_cycle_stats_buffer(struct channel_gk20a *ch);
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void gk20a_channel_timeout_restart_all_channels(struct gk20a *g);
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