gpu: nvgpu: move falcon_gk20a.c|h to hal/falcon/

Move falcon_gk20a.c|h to hal/falcon/falcon_gk20a.c as per new unit
separation requirement.

JIRA NVGPU-2038

Change-Id: If2b7ff78293fc1bd9983399d2bc5261d2365e7f2
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2072380
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2019-03-14 11:11:39 +05:30
committed by mobile promotions
parent 51120a4361
commit cfe935ff5c
9 changed files with 13 additions and 10 deletions

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@@ -191,7 +191,8 @@ nvgpu-y += \
hal/fuse/fuse_gp10b.o \
hal/fuse/fuse_gp106.o \
hal/fifo/engines_gm20b.o \
hal/fifo/engines_gv11b.o
hal/fifo/engines_gv11b.o \
hal/falcon/falcon_gk20a.o
# Linux specific parts of nvgpu.
nvgpu-y += \
@@ -354,7 +355,6 @@ nvgpu-y += \
common/rbtree.o \
common/vbios/bios.o \
common/falcon/falcon.o \
common/falcon/falcon_gk20a.o \
common/falcon/falcon_sw_gk20a.o \
common/falcon/falcon_sw_gp106.o \
common/falcon/falcon_sw_gv100.o \

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@@ -105,7 +105,6 @@ srcs += common/sim.c \
common/ce2.c \
common/vbios/bios.c \
common/falcon/falcon.c \
common/falcon/falcon_gk20a.c \
common/falcon/falcon_sw_gk20a.c \
common/falcon/falcon_sw_gp106.c \
common/falcon/falcon_sw_gv100.c \
@@ -357,7 +356,8 @@ srcs += common/sim.c \
hal/fuse/fuse_gp10b.c \
hal/fuse/fuse_gp106.c \
hal/fifo/engines_gm20b.c \
hal/fifo/engines_gv11b.c
hal/fifo/engines_gv11b.c \
hal/falcon/falcon_gk20a.c
ifeq ($(NVGPU_DEBUGGER),1)
srcs += common/debugger.c

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@@ -46,6 +46,7 @@
#include "hal/fuse/fuse_gm20b.h"
#include "hal/fifo/engines_gm20b.h"
#include "hal/gr/init/gr_init_gm20b.h"
#include "hal/falcon/falcon_gk20a.h"
#include "common/ptimer/ptimer_gk20a.h"
#include "common/fb/fb_gm20b.h"
@@ -58,7 +59,6 @@
#include "common/perf/perf_gm20b.h"
#include "common/pmu/pmu_gk20a.h"
#include "common/pmu/pmu_gm20b.h"
#include "common/falcon/falcon_gk20a.h"
#include "common/top/top_gm20b.h"
#include "common/sync/syncpt_cmdbuf_gk20a.h"
#include "common/sync/sema_cmdbuf_gk20a.h"

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@@ -53,6 +53,7 @@
#include "hal/fuse/fuse_gp10b.h"
#include "hal/fifo/engines_gm20b.h"
#include "hal/gr/init/gr_init_gm20b.h"
#include "hal/falcon/falcon_gk20a.h"
#include "common/ptimer/ptimer_gk20a.h"
#include "common/fb/fb_gm20b.h"
@@ -72,7 +73,6 @@
#include "common/pmu/pmu_gk20a.h"
#include "common/pmu/pmu_gm20b.h"
#include "common/pmu/pmu_gp10b.h"
#include "common/falcon/falcon_gk20a.h"
#include "common/top/top_gm20b.h"
#include "common/top/top_gp10b.h"
#include "common/sync/syncpt_cmdbuf_gk20a.h"

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@@ -40,6 +40,7 @@
#include "hal/fifo/engines_gv11b.h"
#include "hal/gr/init/gr_init_gm20b.h"
#include "hal/gr/hwpm_map/hwpm_map_gv100.h"
#include "hal/falcon/falcon_gk20a.h"
#include "common/ptimer/ptimer_gk20a.h"
#include "common/fb/fb_gm20b.h"
@@ -73,7 +74,6 @@
#include "common/pmu/pmu_gp106.h"
#include "common/pmu/pmu_gv11b.h"
#include "common/pmu/pmu_gv100.h"
#include "common/falcon/falcon_gk20a.h"
#include "common/nvdec/nvdec_gp106.h"
#include "common/nvlink/init/device_reginit_gv100.h"
#include "common/nvlink/intr_and_err_handling_gv100.h"

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@@ -42,6 +42,7 @@
#include "hal/fifo/engines_gv11b.h"
#include "hal/gr/init/gr_init_gm20b.h"
#include "hal/gr/hwpm_map/hwpm_map_gv100.h"
#include "hal/falcon/falcon_gk20a.h"
#include "common/ptimer/ptimer_gk20a.h"
#include "common/fb/fb_gm20b.h"
@@ -68,7 +69,6 @@
#include "common/pmu/pmu_gp10b.h"
#include "common/pmu/pmu_gp106.h"
#include "common/pmu/pmu_gv11b.h"
#include "common/falcon/falcon_gk20a.h"
#include "common/top/top_gm20b.h"
#include "common/top/top_gp10b.h"
#include "common/sync/syncpt_cmdbuf_gv11b.h"

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@@ -421,7 +421,8 @@ static void gk20a_falcon_dump_pc_trace(struct nvgpu_falcon *flcn)
u32 pc = 0;
u32 i = 0;
if ((gk20a_readl(g, base_addr + falcon_falcon_sctl_r()) & 0x02U) != 0U) {
if ((gk20a_readl(g,
base_addr + falcon_falcon_sctl_r()) & 0x02U) != 0U) {
nvgpu_err(g, " falcon is in HS mode, PC TRACE dump not supported");
return;
}

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@@ -22,6 +22,8 @@
#ifndef NVGPU_FALCON_GK20A_H
#define NVGPU_FALCON_GK20A_H
#include <nvgpu/falcon.h>
/* Falcon Register index */
#define FALCON_REG_R0 (0U)
#define FALCON_REG_R1 (1U)

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@@ -42,6 +42,7 @@
#include "hal/fifo/engines_gv11b.h"
#include "hal/gr/init/gr_init_gm20b.h"
#include "hal/gr/hwpm_map/hwpm_map_gv100.h"
#include "hal/falcon/falcon_gk20a.h"
#include "common/ptimer/ptimer_gk20a.h"
#include "common/fb/fb_gm20b.h"
@@ -77,7 +78,6 @@
#include "common/pmu/pmu_gv100.h"
#include "common/pmu/pmu_gv11b.h"
#include "common/pmu/pmu_tu104.h"
#include "common/falcon/falcon_gk20a.h"
#include "common/nvdec/nvdec_tu104.h"
#include "common/top/top_gm20b.h"
#include "common/top/top_gp10b.h"