diff --git a/drivers/gpu/nvgpu/common/fifo/runlist.c b/drivers/gpu/nvgpu/common/fifo/runlist.c
index ca6b5b5e1..e4dd48534 100644
--- a/drivers/gpu/nvgpu/common/fifo/runlist.c
+++ b/drivers/gpu/nvgpu/common/fifo/runlist.c
@@ -806,7 +806,7 @@ int nvgpu_runlist_setup_sw(struct gk20a *g)
 
 	f->runlist_entry_size = g->ops.runlist.entry_size(g);
 	f->num_runlist_entries = g->ops.runlist.length_max(g);
-	f->max_runlists = g->ops.runlist.count_max();
+	f->max_runlists = g->ops.runlist.count_max(g);
 	f->runlist_info = nvgpu_kzalloc(g, nvgpu_safe_mult_u64(
 				sizeof(*f->runlist_info), f->max_runlists));
 	if (f->runlist_info == NULL) {
diff --git a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.c b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.c
index 6ec6bfa47..3e87c7a05 100644
--- a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.c
@@ -35,7 +35,7 @@
 
 #define FECS_MAILBOX_0_ACK_RESTORE 0x4U
 
-u32 gk20a_runlist_count_max(void)
+u32 gk20a_runlist_count_max(struct gk20a *g)
 {
 	return fifo_eng_runlist_base__size_1_v();
 }
diff --git a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.h b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.h
index 5d255f652..fc149dc32 100644
--- a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.h
@@ -35,7 +35,7 @@ int gk20a_fifo_reschedule_preempt_next(struct nvgpu_channel *ch,
 		bool wait_preempt);
 #endif
 #ifdef CONFIG_NVGPU_HAL_NON_FUSA
-u32 gk20a_runlist_count_max(void);
+u32 gk20a_runlist_count_max(struct gk20a *g);
 #endif
 
 u32 gk20a_runlist_length_max(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv100.c b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv100.c
index e9d5d4d27..3076ffac0 100644
--- a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv100.c
+++ b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv100.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -23,8 +23,9 @@
 #include "runlist_fifo_gv100.h"
 
 #include <nvgpu/hw/gv100/hw_fifo_gv100.h>
+struct gk20a;
 
-u32 gv100_runlist_count_max(void)
+u32 gv100_runlist_count_max(struct gk20a *g)
 {
 	return fifo_eng_runlist_base__size_1_v();
 }
diff --git a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv100.h b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv100.h
index 134144b03..6e5ce6b6c 100644
--- a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv100.h
+++ b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv100.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -24,7 +24,8 @@
 #define NVGPU_RUNLIST_FIFO_GV100_H
 
 #include <nvgpu/types.h>
+struct gk20a;
 
-u32 gv100_runlist_count_max(void);
+u32 gv100_runlist_count_max(struct gk20a *g);
 
 #endif /* NVGPU_RUNLIST_FIFO_GV100_H */
diff --git a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv11b.h b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv11b.h
index 16ee1a5f7..4357ff320 100644
--- a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv11b.h
+++ b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv11b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -26,10 +26,11 @@
 #include <nvgpu/types.h>
 
 struct nvgpu_channel;
+struct gk20a;
 
 #ifdef CONFIG_NVGPU_CHANNEL_TSG_SCHEDULING
 int gv11b_runlist_reschedule(struct nvgpu_channel *ch, bool preempt_next);
 #endif
-u32 gv11b_runlist_count_max(void);
+u32 gv11b_runlist_count_max(struct gk20a *g);
 
 #endif /* NVGPU_RUNLIST_FIFO_GV11B_H */
diff --git a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv11b_fusa.c
index ba12bb9ff..4963f056b 100644
--- a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv11b_fusa.c
+++ b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gv11b_fusa.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -25,8 +25,9 @@
 #include "runlist_fifo_gv11b.h"
 
 #include <nvgpu/hw/gv11b/hw_fifo_gv11b.h>
+struct gk20a;
 
-u32 gv11b_runlist_count_max(void)
+u32 gv11b_runlist_count_max(struct gk20a *g)
 {
 	return fifo_eng_runlist_base__size_1_v();
 }
diff --git a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.c b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.c
index 3e93fe4ed..14bc58350 100644
--- a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.c
+++ b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -27,8 +27,9 @@
 #include "runlist_fifo_tu104.h"
 
 #include <nvgpu/hw/tu104/hw_fifo_tu104.h>
+struct gk20a;
 
-u32 tu104_runlist_count_max(void)
+u32 tu104_runlist_count_max(struct gk20a *g)
 {
 	return fifo_runlist_base_lo__size_1_v();
 }
diff --git a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.h b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.h
index acf0dee41..595934391 100644
--- a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.h
+++ b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -27,7 +27,7 @@
 
 struct gk20a;
 
-u32 tu104_runlist_count_max(void);
+u32 tu104_runlist_count_max(struct gk20a *g);
 void tu104_runlist_hw_submit(struct gk20a *g, u32 runlist_id,
 		u32 count, u32 buffer_index);
 int tu104_runlist_wait_pending(struct gk20a *g, u32 runlist_id);
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index 30bae37f5..68cf176d4 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -238,6 +238,7 @@ struct railgate_stats {
 #define GPU_LIT_SM_SHARED_BASE			46
 #define GPU_LIT_GPC_ADDR_WIDTH			47
 #define GPU_LIT_TPC_ADDR_WIDTH			48
+#define GPU_LIT_MAX_RUNLISTS_SUPPORTED		49
 
 #define nvgpu_get_litter_value(g, v) ((g)->ops.get_litter_value((g), v))
 
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops_runlist.h b/drivers/gpu/nvgpu/include/nvgpu/gops_runlist.h
index 64440ddff..56865e48c 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gops_runlist.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gops_runlist.h
@@ -73,7 +73,7 @@ struct gops_runlist {
 	int (*update_for_channel)(struct gk20a *g, u32 runlist_id,
 			struct nvgpu_channel *ch, bool add,
 			bool wait_for_finish);
-	u32 (*count_max)(void);
+	u32 (*count_max)(struct gk20a *g);
 	u32 (*entry_size)(struct gk20a *g);
 	u32 (*length_max)(struct gk20a *g);
 	void (*get_tsg_entry)(struct nvgpu_tsg *tsg,
diff --git a/userspace/units/fifo/runlist/gv11b/nvgpu-runlist-gv11b.c b/userspace/units/fifo/runlist/gv11b/nvgpu-runlist-gv11b.c
index 116150f7d..f7aa0361f 100644
--- a/userspace/units/fifo/runlist/gv11b/nvgpu-runlist-gv11b.c
+++ b/userspace/units/fifo/runlist/gv11b/nvgpu-runlist-gv11b.c
@@ -160,7 +160,7 @@ done:
 int test_gv11b_runlist_count_max(struct unit_module *m,
 		struct gk20a *g, void *args)
 {
-	if (gv11b_runlist_count_max() != fifo_eng_runlist_base__size_1_v()) {
+	if (gv11b_runlist_count_max(g) != fifo_eng_runlist_base__size_1_v()) {
 		unit_return_fail(m, "runlist count max value incorrect\n");
 	}