nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 10:34:43 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: reserve pma stream for legacy profiler

Browse Source 
Legacy profiler does not reserve PMA stream resource with PM
reservation system. Also, HWPM system reset is separately implemented
in membuf disable path. And it does not even restore perf unit SLCG
prod values.

Allcoate a dummy profiler object for debug session in perfbuf map
path. Free it in perfbuf unmap path.

This has advantage of synchronizing PMA stream reservation with new
profiler stack. And this also leverages HWPM system reset and SLCG
handling code during resource reservation.

Remove explicit HWPM reset from gops.perf.membuf_reset_streaming()
HALs

Bug 2510974
Jira NVGPU-5360

Change-Id: I54c5202b6251dea3d80a4dfc011e8a296339e07f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2399595
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2020-08-17 12:13:50 +05:30
committed by Alex Waterman
parent d90b9a3d4e
commit d020778c55
4 changed files with 62 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/nvgpu/hal/perf/perf_gm20b.c
View File

@@ -24,8 +24,6 @@
#include <nvgpu/mm.h>
#include <nvgpu/bug.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/mc.h>
#include <nvgpu/gops_mc.h>
#include "perf_gm20b.h"
@@ -55,8 +53,6 @@ void gm20b_perf_membuf_reset_streaming(struct gk20a *g)
u32 engine_status;
u32 num_unread_bytes;
g->ops.mc.reset(g, g->ops.mc.reset_mask(g, NVGPU_UNIT_PERFMON));
engine_status = nvgpu_readl(g, perf_pmasys_enginestatus_r());
WARN_ON(0U ==
(engine_status & perf_pmasys_enginestatus_rbufempty_empty_f()));