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gpu: nvgpu: allocate object context for specific GR instance
Add new API nvgpu_get_gpu_instance_id_from_cdev() that returns GPU instance id from nvgpu_cdev pointer. Store cdev pointer in channel private data channel_priv and ctrl node private data gk20a_ctrl_priv. Update below functions to pass cdev pointer : __gk20a_channel_open() gk20a_channel_open_ioctl() In gk20a_channel_ioctl(), extract gpu instance id using cdev pointer stored in channel_priv and new API nvgpu_get_gpu_instance_id_from_cdev(). Extract GR instance id using nvgpu_grmgr_get_gr_instance_id() Invoke context creation API inside nvgpu_gr_exec_with_err_for_instance() so that context is created with correct GR instance id. Jira NVGPU-5648 Change-Id: I5a4e79165e021b56181d08105b2185306a19703b Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2435465 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Lakshmanan M <lm@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
This commit is contained in:
committed by
Alex Waterman
parent
69948919b7
commit
d0a1f30e66
@@ -44,16 +44,19 @@
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#include <nvgpu/runlist.h>
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#include <nvgpu/gr/ctx.h>
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#include <nvgpu/gr/obj_ctx.h>
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#include <nvgpu/gr/gr_instances.h>
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#include <nvgpu/fence.h>
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#include <nvgpu/preempt.h>
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#include <nvgpu/swprofile.h>
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#include <nvgpu/nvgpu_init.h>
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#include <nvgpu/user_fence.h>
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#include <nvgpu/grmgr.h>
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#include <nvgpu/fifo/swprofile.h>
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#include "platform_gk20a.h"
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#include "ioctl_channel.h"
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#include "ioctl.h"
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#include "channel.h"
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#include "os_linux.h"
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@@ -121,6 +124,7 @@ static void gk20a_channel_trace_sched_param(
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struct channel_priv {
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struct gk20a *g;
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struct nvgpu_channel *c;
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struct nvgpu_cdev *cdev;
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};
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#if defined(CONFIG_NVGPU_CYCLESTATS)
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@@ -462,8 +466,8 @@ channel_release:
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}
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/* note: runlist_id -1 is synonym for the NVGPU_ENGINE_GR runlist id */
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static int __gk20a_channel_open(struct gk20a *g,
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struct file *filp, s32 runlist_id)
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static int __gk20a_channel_open(struct gk20a *g, struct nvgpu_cdev *cdev,
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struct file *filp, s32 runlist_id)
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{
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int err;
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struct nvgpu_channel *ch;
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@@ -516,6 +520,7 @@ static int __gk20a_channel_open(struct gk20a *g,
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priv->g = g;
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priv->c = ch;
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priv->cdev = cdev;
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filp->private_data = priv;
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return 0;
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@@ -537,13 +542,13 @@ int gk20a_channel_open(struct inode *inode, struct file *filp)
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g = get_gk20a(cdev->node->parent);
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nvgpu_log_fn(g, "start");
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ret = __gk20a_channel_open(g, filp, -1);
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ret = __gk20a_channel_open(g, cdev, filp, -1);
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nvgpu_log_fn(g, "end");
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return ret;
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}
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int gk20a_channel_open_ioctl(struct gk20a *g,
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int gk20a_channel_open_ioctl(struct gk20a *g, struct nvgpu_cdev *cdev,
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struct nvgpu_channel_open_args *args)
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{
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int err;
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@@ -566,7 +571,7 @@ int gk20a_channel_open_ioctl(struct gk20a *g,
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goto clean_up;
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}
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err = __gk20a_channel_open(g, file, runlist_id);
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err = __gk20a_channel_open(g, cdev, file, runlist_id);
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if (err)
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goto clean_up_file;
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@@ -1151,6 +1156,7 @@ long gk20a_channel_ioctl(struct file *filp,
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u8 buf[NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE] = {0};
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int err = 0;
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struct gk20a *g = ch->g;
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u32 gpu_instance_id, gr_instance_id;
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nvgpu_log_fn(g, "start %d", _IOC_NR(cmd));
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@@ -1170,6 +1176,12 @@ long gk20a_channel_ioctl(struct file *filp,
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if (!ch)
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return -ETIMEDOUT;
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gpu_instance_id = nvgpu_get_gpu_instance_id_from_cdev(g, priv->cdev);
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nvgpu_assert(gpu_instance_id < g->mig.num_gpu_instances);
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gr_instance_id = nvgpu_grmgr_get_gr_instance_id(g, gpu_instance_id);
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nvgpu_assert(gr_instance_id < g->num_gr_instances);
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/* protect our sanity for threaded userspace - most of the channel is
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* not thread safe */
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nvgpu_mutex_acquire(&ch->ioctl_lock);
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@@ -1180,7 +1192,7 @@ long gk20a_channel_ioctl(struct file *filp,
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nvgpu_speculation_barrier();
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switch (cmd) {
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case NVGPU_IOCTL_CHANNEL_OPEN:
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err = gk20a_channel_open_ioctl(ch->g,
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err = gk20a_channel_open_ioctl(ch->g, priv->cdev,
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(struct nvgpu_channel_open_args *)buf);
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break;
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case NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD:
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@@ -1215,7 +1227,9 @@ long gk20a_channel_ioctl(struct file *filp,
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}
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#endif
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err = nvgpu_ioctl_channel_alloc_obj_ctx(ch, args->class_num, args->flags);
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err = nvgpu_gr_exec_with_err_for_instance(g, gr_instance_id,
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nvgpu_ioctl_channel_alloc_obj_ctx(ch, args->class_num,
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args->flags));
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gk20a_idle(ch->g);
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break;
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}
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