gpu: nvgpu: allocate object context for specific GR instance

Add new API nvgpu_get_gpu_instance_id_from_cdev() that returns GPU
instance id from nvgpu_cdev pointer.

Store cdev pointer in channel private data channel_priv and ctrl node
private data gk20a_ctrl_priv.

Update below functions to pass cdev pointer :
__gk20a_channel_open()
gk20a_channel_open_ioctl()

In gk20a_channel_ioctl(), extract gpu instance id using cdev pointer
stored in channel_priv and new API nvgpu_get_gpu_instance_id_from_cdev().
Extract GR instance id using nvgpu_grmgr_get_gr_instance_id()

Invoke context creation API inside nvgpu_gr_exec_with_err_for_instance()
so that context is created with correct GR instance id.

Jira NVGPU-5648

Change-Id: I5a4e79165e021b56181d08105b2185306a19703b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2435465
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit

drivers/gpu/nvgpu/os/linux/ioctl.c

@@ -558,3 +558,15 @@ fail:
 	gk20a_user_deinit(dev);
 	return err;
 }
+
+u32 nvgpu_get_gpu_instance_id_from_cdev(struct gk20a *g, struct nvgpu_cdev *cdev)
+{
+	struct nvgpu_cdev_class_priv_data *priv_data;
+
+	if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) {
+		priv_data = dev_get_drvdata(cdev->node);
+		return priv_data->local_instance_id;
+	}
+
+	return 0;
+}

drivers/gpu/nvgpu/os/linux/ioctl.h

@@ -14,8 +14,11 @@
 #define __NVGPU_IOCTL_H__
 
 struct device;
+struct nvgpu_cdev;
 
 int gk20a_user_init(struct device *dev);
 void gk20a_user_deinit(struct device *dev);
 
+u32 nvgpu_get_gpu_instance_id_from_cdev(struct gk20a *g, struct nvgpu_cdev *cdev);
+
 #endif

drivers/gpu/nvgpu/os/linux/ioctl_channel.c

@@ -44,16 +44,19 @@
 #include <nvgpu/runlist.h>
 #include <nvgpu/gr/ctx.h>
 #include <nvgpu/gr/obj_ctx.h>
+#include <nvgpu/gr/gr_instances.h>
 #include <nvgpu/fence.h>
 #include <nvgpu/preempt.h>
 #include <nvgpu/swprofile.h>
 #include <nvgpu/nvgpu_init.h>
 #include <nvgpu/user_fence.h>
+#include <nvgpu/grmgr.h>
 
 #include <nvgpu/fifo/swprofile.h>
 
 #include "platform_gk20a.h"
 #include "ioctl_channel.h"
+#include "ioctl.h"
 #include "channel.h"
 #include "os_linux.h"
 
@@ -121,6 +124,7 @@ static void gk20a_channel_trace_sched_param(
 struct channel_priv {
 	struct gk20a *g;
 	struct nvgpu_channel *c;
+	struct nvgpu_cdev *cdev;
 };
 
 #if defined(CONFIG_NVGPU_CYCLESTATS)
@@ -462,8 +466,8 @@ channel_release:
 }
 
 /* note: runlist_id -1 is synonym for the NVGPU_ENGINE_GR runlist id */
-static int __gk20a_channel_open(struct gk20a *g,
+static int __gk20a_channel_open(struct gk20a *g, struct nvgpu_cdev *cdev,
-				struct file *filp, s32 runlist_id)
+		struct file *filp, s32 runlist_id)
 {
 	int err;
 	struct nvgpu_channel *ch;
@@ -516,6 +520,7 @@ static int __gk20a_channel_open(struct gk20a *g,
 
 	priv->g = g;
 	priv->c = ch;
+	priv->cdev = cdev;
 
 	filp->private_data = priv;
 	return 0;
@@ -537,13 +542,13 @@ int gk20a_channel_open(struct inode *inode, struct file *filp)
 	g = get_gk20a(cdev->node->parent);
 
 	nvgpu_log_fn(g, "start");
-	ret = __gk20a_channel_open(g, filp, -1);
+	ret = __gk20a_channel_open(g, cdev, filp, -1);
 
 	nvgpu_log_fn(g, "end");
 	return ret;
 }
 
-int gk20a_channel_open_ioctl(struct gk20a *g,
+int gk20a_channel_open_ioctl(struct gk20a *g, struct nvgpu_cdev *cdev,
 		struct nvgpu_channel_open_args *args)
 {
 	int err;
@@ -566,7 +571,7 @@ int gk20a_channel_open_ioctl(struct gk20a *g,
 		goto clean_up;
 	}
 
-	err = __gk20a_channel_open(g, file, runlist_id);
+	err = __gk20a_channel_open(g, cdev, file, runlist_id);
 	if (err)
 		goto clean_up_file;
 
@@ -1151,6 +1156,7 @@ long gk20a_channel_ioctl(struct file *filp,
 	u8 buf[NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE] = {0};
 	int err = 0;
 	struct gk20a *g = ch->g;
+	u32 gpu_instance_id, gr_instance_id;
 
 	nvgpu_log_fn(g, "start %d", _IOC_NR(cmd));
 
@@ -1170,6 +1176,12 @@ long gk20a_channel_ioctl(struct file *filp,
 	if (!ch)
 		return -ETIMEDOUT;
 
+	gpu_instance_id = nvgpu_get_gpu_instance_id_from_cdev(g, priv->cdev);
+	nvgpu_assert(gpu_instance_id < g->mig.num_gpu_instances);
+
+	gr_instance_id = nvgpu_grmgr_get_gr_instance_id(g, gpu_instance_id);
+	nvgpu_assert(gr_instance_id < g->num_gr_instances);
+
 	/* protect our sanity for threaded userspace - most of the channel is
 	 * not thread safe */
 	nvgpu_mutex_acquire(&ch->ioctl_lock);
@@ -1180,7 +1192,7 @@ long gk20a_channel_ioctl(struct file *filp,
 	nvgpu_speculation_barrier();
 	switch (cmd) {
 	case NVGPU_IOCTL_CHANNEL_OPEN:
-		err = gk20a_channel_open_ioctl(ch->g,
+		err = gk20a_channel_open_ioctl(ch->g, priv->cdev,
 			(struct nvgpu_channel_open_args *)buf);
 		break;
 	case NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD:
@@ -1215,7 +1227,9 @@ long gk20a_channel_ioctl(struct file *filp,
 	}
 #endif
 
-		err = nvgpu_ioctl_channel_alloc_obj_ctx(ch, args->class_num, args->flags);
+		err = nvgpu_gr_exec_with_err_for_instance(g, gr_instance_id,
+				nvgpu_ioctl_channel_alloc_obj_ctx(ch, args->class_num,
+					args->flags));
 		gk20a_idle(ch->g);
 		break;
 	}

drivers/gpu/nvgpu/os/linux/ioctl_channel.h

@@ -22,6 +22,7 @@ struct file;
 struct gk20a;
 struct nvgpu_channel_open_args;
 struct nvgpu_channel;
+struct nvgpu_cdev;
 
 struct gk20a_cs_snapshot_client_linux {
 	struct gk20a_cs_snapshot_client cs_client;
@@ -36,7 +37,7 @@ int gk20a_channel_open(struct inode *inode, struct file *filp);
 int gk20a_channel_release(struct inode *inode, struct file *filp);
 long gk20a_channel_ioctl(struct file *filp,
 	unsigned int cmd, unsigned long arg);
-int gk20a_channel_open_ioctl(struct gk20a *g,
+int gk20a_channel_open_ioctl(struct gk20a *g, struct nvgpu_cdev *cdev,
 		struct nvgpu_channel_open_args *args);
 
 int gk20a_channel_cycle_stats(struct nvgpu_channel *ch, int dmabuf_fd);

drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c

@@ -79,6 +79,7 @@ struct gk20a_ctrl_priv {
 	struct device *dev;
 	struct gk20a *g;
 	struct nvgpu_clk_session *clk_session;
+	struct nvgpu_cdev *cdev;
 
 	struct nvgpu_list_node list;
 	struct {
@@ -133,6 +134,7 @@ int gk20a_ctrl_dev_open(struct inode *inode, struct file *filp)
 	}
 	filp->private_data = priv;
 	priv->dev = dev_from_gk20a(g);
+	priv->cdev = cdev;
 	/*
 	 * We dont close the arbiter fd's after driver teardown to support
 	 * GPU_LOST events, so we store g here, instead of dereferencing the
@@ -1964,7 +1966,7 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
 	case NVGPU_GPU_IOCTL_OPEN_CHANNEL:
 		/* this arg type here, but ..gpu_open_channel_args in nvgpu.h
 		 * for consistency - they are the same */
-		err = gk20a_channel_open_ioctl(g,
+		err = gk20a_channel_open_ioctl(g, priv->cdev,
 			(struct nvgpu_channel_open_args *)buf);
 		break;
 	case NVGPU_GPU_IOCTL_FLUSH_L2: