diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile
index 9e60e6a50..1bc2b9cc1 100644
--- a/drivers/gpu/nvgpu/Makefile
+++ b/drivers/gpu/nvgpu/Makefile
@@ -80,6 +80,7 @@ nvgpu-y := \
gm206/hal_gm206.o \
gm206/gr_gm206.o \
gm206/acr_gm206.o \
+ gm206/mm_gm206.o \
gm206/pmu_gm206.o \
gm206/ce_gm206.o
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index c7d12f862..6622dad06 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -524,6 +524,7 @@ struct gpu_ops {
u64 (*get_iova_addr)(struct gk20a *g, struct scatterlist *sgl,
u32 flags);
int (*bar1_bind)(struct gk20a *g, u64 bar1_iova);
+ size_t (*get_vidmem_size)(struct gk20a *g);
} mm;
struct {
int (*init_therm_setup_hw)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 6505015f7..60c1b7eaf 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -613,6 +613,20 @@ static void gk20a_init_pramin(struct mm_gk20a *mm)
mm->force_pramin = GK20A_FORCE_PRAMIN_DEFAULT;
}
+static int gk20a_init_vidmem(struct mm_gk20a *mm)
+{
+ struct gk20a *g = mm->g;
+ size_t size = g->ops.mm.get_vidmem_size ?
+ g->ops.mm.get_vidmem_size(g) : 0;
+
+ if (!size)
+ return 0;
+
+ mm->vidmem_size = size;
+
+ return 0;
+}
+
int gk20a_init_mm_setup_sw(struct gk20a *g)
{
struct mm_gk20a *mm = &g->mm;
@@ -637,6 +651,7 @@ int gk20a_init_mm_setup_sw(struct gk20a *g)
(int)(mm->channel.kernel_size >> 20));
gk20a_init_pramin(mm);
+ gk20a_init_vidmem(mm);
err = gk20a_alloc_sysmem_flush(g);
if (err)
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
index e83e11115..590ede711 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
@@ -372,6 +372,8 @@ struct mm_gk20a {
#else
bool force_pramin; /* via debugfs */
#endif
+
+ size_t vidmem_size;
};
int gk20a_mm_init(struct mm_gk20a *mm);
diff --git a/drivers/gpu/nvgpu/gm206/hal_gm206.c b/drivers/gpu/nvgpu/gm206/hal_gm206.c
index 6b5c70e23..f6034aca6 100644
--- a/drivers/gpu/nvgpu/gm206/hal_gm206.c
+++ b/drivers/gpu/nvgpu/gm206/hal_gm206.c
@@ -21,6 +21,7 @@
#include "gm20b/mc_gm20b.h"
#include "gm20b/ltc_gm20b.h"
#include "gm20b/mm_gm20b.h"
+#include "gm206/mm_gm206.h"
#include "ce_gm206.h"
#include "gm20b/fb_gm20b.h"
#include "gm20b/pmu_gm20b.h"
@@ -188,7 +189,7 @@ int gm206_init_hal(struct gk20a *g)
gm206_init_fifo(gops);
gm206_init_ce(gops);
gm20b_init_gr_ctx(gops);
- gm20b_init_mm(gops);
+ gm206_init_mm(gops);
gm206_init_pmu_ops(gops);
gm20b_init_clk_ops(gops);
gm20b_init_regops(gops);
diff --git a/drivers/gpu/nvgpu/gm206/hw_fbpa_gm206.h b/drivers/gpu/nvgpu/gm206/hw_fbpa_gm206.h
new file mode 100644
index 000000000..3a1d19818
--- /dev/null
+++ b/drivers/gpu/nvgpu/gm206/hw_fbpa_gm206.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ */
+/*
+ * Function naming determines intended use:
+ *
+ * _r(void) : Returns the offset for register .
+ *
+ * _o(void) : Returns the offset for element .
+ *
+ * _w(void) : Returns the word offset for word (4 byte) element .
+ *
+ * __s(void) : Returns size of field of register in bits.
+ *
+ * __f(u32 v) : Returns a value based on 'v' which has been shifted
+ * and masked to place it at field of register . This value
+ * can be |'d with others to produce a full register value for
+ * register .
+ *
+ * __m(void) : Returns a mask for field of register . This
+ * value can be ~'d and then &'d to clear the value of field for
+ * register .
+ *
+ * ___f(void) : Returns the constant value after being shifted
+ * to place it at field of register . This value can be |'d
+ * with others to produce a full register value for .
+ *
+ * __v(u32 r) : Returns the value of field from a full register
+ * value 'r' after being shifted to place its LSB at bit 0.
+ * This value is suitable for direct comparison with other unshifted
+ * values appropriate for use in field of register .
+ *
+ * ___v(void) : Returns the constant value for defined for
+ * field of register . This value is suitable for direct
+ * comparison with unshifted values appropriate for use in field
+ * of register .
+ */
+#ifndef _hw_fbpa_gp106_h_
+#define _hw_fbpa_gp106_h_
+
+static inline u32 fbpa_cstatus_r(void)
+{
+ return 0x0010f20c;
+}
+static inline u32 fbpa_cstatus_ramamount_v(u32 r)
+{
+ return (r >> 0) & 0x1ffff;
+}
+#endif
diff --git a/drivers/gpu/nvgpu/gm206/hw_top_gm206.h b/drivers/gpu/nvgpu/gm206/hw_top_gm206.h
index 988f24ea5..b0d571cf4 100644
--- a/drivers/gpu/nvgpu/gm206/hw_top_gm206.h
+++ b/drivers/gpu/nvgpu/gm206/hw_top_gm206.h
@@ -74,6 +74,14 @@ static inline u32 top_num_fbps_value_v(u32 r)
{
return (r >> 0) & 0x1f;
}
+static inline u32 top_num_fbpas_r(void)
+{
+ return 0x0002243c;
+}
+static inline u32 top_num_fbpas_value_v(u32 r)
+{
+ return (r >> 0) & 0x1f;
+}
static inline u32 top_ltc_per_fbp_r(void)
{
return 0x00022450;
diff --git a/drivers/gpu/nvgpu/gm206/mm_gm206.c b/drivers/gpu/nvgpu/gm206/mm_gm206.c
new file mode 100644
index 000000000..c3763d58e
--- /dev/null
+++ b/drivers/gpu/nvgpu/gm206/mm_gm206.c
@@ -0,0 +1,35 @@
+/*
+ * GM206 memory management
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#include "gk20a/gk20a.h"
+#include "gm20b/mm_gm20b.h"
+
+#include "hw_fbpa_gm206.h"
+#include "hw_top_gm206.h"
+
+static size_t gm206_mm_get_vidmem_size(struct gk20a *g)
+{
+ u32 fbpas = top_num_fbpas_value_v(
+ gk20a_readl(g, top_num_fbpas_r()));
+ u32 ram = fbpa_cstatus_ramamount_v(
+ gk20a_readl(g, fbpa_cstatus_r()));
+ return (size_t)fbpas * ram * SZ_1M;
+}
+
+void gm206_init_mm(struct gpu_ops *gops)
+{
+ gm20b_init_mm(gops);
+ gops->mm.get_vidmem_size = gm206_mm_get_vidmem_size;
+}
diff --git a/drivers/gpu/nvgpu/gm206/mm_gm206.h b/drivers/gpu/nvgpu/gm206/mm_gm206.h
new file mode 100644
index 000000000..60aa6fe46
--- /dev/null
+++ b/drivers/gpu/nvgpu/gm206/mm_gm206.h
@@ -0,0 +1,24 @@
+/*
+ * GM206 memory management
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef MM_GM206_H
+#define MM_GM206_H
+
+struct gpu_ops;
+
+void gm206_init_mm(struct gpu_ops *gops);
+
+#endif
+