diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 3af244582..1842b5415 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -42,6 +42,7 @@ ccflags-y += -DCONFIG_NVGPU_POWER_PG ccflags-y += -DCONFIG_NVGPU_CE ccflags-y += -DCONFIG_NVGPU_COMPRESSION ccflags-y += -DCONFIG_NVGPU_SIM +ccflags-y += -DCONFIG_NVGPU_TRACE ifeq ($(CONFIG_NVGPU_LOGGING),y) ccflags-y += -DCONFIG_NVGPU_LOGGING=1 diff --git a/drivers/gpu/nvgpu/Makefile.shared.configs b/drivers/gpu/nvgpu/Makefile.shared.configs index 79a482e34..599a43266 100644 --- a/drivers/gpu/nvgpu/Makefile.shared.configs +++ b/drivers/gpu/nvgpu/Makefile.shared.configs @@ -110,6 +110,9 @@ ifneq ($(profile),safety) CONFIG_NVGPU_LOGGING := 1 NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_LOGGING +CONFIG_NVGPU_TRACE := 1 +NVGPU_COMMON_CFLAGS += -DCONFIG_NVGPU_TRACE + ifneq ($(profile),safety_debug) # ACR feature to enable old tegra ACR profile support diff --git a/drivers/gpu/nvgpu/common/fifo/channel.c b/drivers/gpu/nvgpu/common/fifo/channel.c index 541aa74fb..af697a98b 100644 --- a/drivers/gpu/nvgpu/common/fifo/channel.c +++ b/drivers/gpu/nvgpu/common/fifo/channel.c @@ -105,7 +105,9 @@ static void free_channel(struct nvgpu_fifo *f, { struct gk20a *g = f->g; +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_release_used_channel(ch->chid); +#endif /* refcount is zero here and channel is in a freed/dead state */ nvgpu_mutex_acquire(&f->free_chs_mutex); /* add to head to increase visibility of timing-related bugs */ @@ -307,7 +309,9 @@ static void gk20a_free_channel(struct nvgpu_channel *ch, bool force) timeout = nvgpu_get_poll_timeout(g); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_free_channel(ch->chid); +#endif /* * Disable channel/TSG and unbind here. This should not be executed if @@ -684,7 +688,9 @@ struct nvgpu_channel *gk20a_open_new_channel(struct gk20a *g, return NULL; } +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_open_new_channel(ch->chid); +#endif BUG_ON(ch->g != NULL); ch->g = g; diff --git a/drivers/gpu/nvgpu/common/fifo/fifo.c b/drivers/gpu/nvgpu/common/fifo/fifo.c index c925f6d42..6b7cd5350 100644 --- a/drivers/gpu/nvgpu/common/fifo/fifo.c +++ b/drivers/gpu/nvgpu/common/fifo/fifo.c @@ -22,7 +22,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include diff --git a/drivers/gpu/nvgpu/common/fifo/submit.c b/drivers/gpu/nvgpu/common/fifo/submit.c index 6b5c6e68a..f736862b7 100644 --- a/drivers/gpu/nvgpu/common/fifo/submit.c +++ b/drivers/gpu/nvgpu/common/fifo/submit.c @@ -31,7 +31,9 @@ #include #include +#ifdef CONFIG_NVGPU_TRACE #include +#endif /* * Handle the submit synchronization - pre-fences and post-fences. @@ -197,10 +199,12 @@ static void nvgpu_submit_append_priv_cmdbuf(struct nvgpu_channel *c, c->gpfifo.put * (u32)sizeof(gpfifo_entry), &gpfifo_entry, (u32)sizeof(gpfifo_entry)); +#ifdef CONFIG_NVGPU_TRACE if (cmd->mem->aperture == APERTURE_SYSMEM) { trace_gk20a_push_cmdbuf(g->name, 0, cmd->size, 0, (u32 *)cmd->mem->cpu_va + cmd->off); } +#endif c->gpfifo.put = (c->gpfifo.put + 1U) & (c->gpfifo.entry_num - 1U); } @@ -495,12 +499,14 @@ static int nvgpu_submit_channel_gpfifo(struct nvgpu_channel *c, goto clean_up; } +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_channel_submit_gpfifo(g->name, c->chid, num_entries, flags, fence ? fence->id : 0, fence ? fence->value : 0); +#endif nvgpu_log_info(g, "pre-submit put %d, get %d, size %d", c->gpfifo.put, c->gpfifo.get, c->gpfifo.entry_num); @@ -579,12 +585,14 @@ static int nvgpu_submit_channel_gpfifo(struct nvgpu_channel *c, nvgpu_rwsem_up_read(&g->deterministic_busy); } +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_channel_submitted_gpfifo(g->name, c->chid, num_entries, flags, post_fence ? post_fence->syncpt_id : 0, post_fence ? post_fence->syncpt_value : 0); +#endif nvgpu_log_info(g, "post-submit put %d, get %d, size %d", c->gpfifo.put, c->gpfifo.get, c->gpfifo.entry_num); diff --git a/drivers/gpu/nvgpu/common/fifo/userd.c b/drivers/gpu/nvgpu/common/fifo/userd.c index 2ff3df8aa..28e1d334b 100644 --- a/drivers/gpu/nvgpu/common/fifo/userd.c +++ b/drivers/gpu/nvgpu/common/fifo/userd.c @@ -22,7 +22,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include diff --git a/drivers/gpu/nvgpu/common/init/nvgpu_init.c b/drivers/gpu/nvgpu/common/init/nvgpu_init.c index 7174261fd..3159e41a9 100644 --- a/drivers/gpu/nvgpu/common/init/nvgpu_init.c +++ b/drivers/gpu/nvgpu/common/init/nvgpu_init.c @@ -47,7 +47,9 @@ #include #include +#ifdef CONFIG_NVGPU_TRACE #include +#endif #ifdef CONFIG_NVGPU_LS_PMU #include #endif diff --git a/drivers/gpu/nvgpu/common/mm/as.c b/drivers/gpu/nvgpu/common/mm/as.c index 28008dbbd..4c9b21c14 100644 --- a/drivers/gpu/nvgpu/common/mm/as.c +++ b/drivers/gpu/nvgpu/common/mm/as.c @@ -22,7 +22,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include diff --git a/drivers/gpu/nvgpu/common/vgpu/fifo/fifo_vgpu.c b/drivers/gpu/nvgpu/common/vgpu/fifo/fifo_vgpu.c index 47fc7a5d3..f62f9d76f 100644 --- a/drivers/gpu/nvgpu/common/vgpu/fifo/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/common/vgpu/fifo/fifo_vgpu.c @@ -22,7 +22,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include @@ -455,7 +457,9 @@ int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info) nvgpu_err(g, "fifo intr (%d) on ch %u", info->type, info->chid); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_channel_reset(ch->chid, ch->tsgid); +#endif switch (info->type) { case TEGRA_VGPU_FIFO_INTR_PBDMA: diff --git a/drivers/gpu/nvgpu/common/vgpu/fifo/userd_vgpu.c b/drivers/gpu/nvgpu/common/vgpu/fifo/userd_vgpu.c index add7c00a8..2e71b94c6 100644 --- a/drivers/gpu/nvgpu/common/vgpu/fifo/userd_vgpu.c +++ b/drivers/gpu/nvgpu/common/vgpu/fifo/userd_vgpu.c @@ -22,7 +22,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include diff --git a/drivers/gpu/nvgpu/hal/cbc/cbc_gm20b.c b/drivers/gpu/nvgpu/hal/cbc/cbc_gm20b.c index 085ce7843..21e2b4d1f 100644 --- a/drivers/gpu/nvgpu/hal/cbc/cbc_gm20b.c +++ b/drivers/gpu/nvgpu/hal/cbc/cbc_gm20b.c @@ -22,7 +22,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include @@ -133,7 +135,9 @@ int gm20b_cbc_ctrl(struct gk20a *g, enum nvgpu_cbc_op op, nvgpu_log_fn(g, " "); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_ltc_cbc_ctrl_start(g->name, op, min, max); +#endif if (g->cbc->compbit_store.mem.size == 0ULL) { return 0; @@ -209,7 +213,9 @@ int gm20b_cbc_ctrl(struct gk20a *g, enum nvgpu_cbc_op op, nvgpu_mutex_release(&g->mm.l2_op_lock); } out: +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_ltc_cbc_ctrl_done(g->name); +#endif nvgpu_mutex_release(&g->mm.l2_op_lock); return err; } diff --git a/drivers/gpu/nvgpu/hal/cbc/cbc_gp10b.c b/drivers/gpu/nvgpu/hal/cbc/cbc_gp10b.c index de88c7db4..6f1b3da2e 100644 --- a/drivers/gpu/nvgpu/hal/cbc/cbc_gp10b.c +++ b/drivers/gpu/nvgpu/hal/cbc/cbc_gp10b.c @@ -22,7 +22,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include @@ -130,7 +132,9 @@ int gp10b_cbc_ctrl(struct gk20a *g, enum nvgpu_cbc_op op, nvgpu_log_fn(g, " "); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_ltc_cbc_ctrl_start(g->name, op, min, max); +#endif if (g->cbc->compbit_store.mem.size == 0U) { return 0; @@ -209,7 +213,9 @@ int gp10b_cbc_ctrl(struct gk20a *g, enum nvgpu_cbc_op op, nvgpu_mutex_release(&g->mm.l2_op_lock); } out: +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_ltc_cbc_ctrl_done(g->name); +#endif nvgpu_mutex_release(&g->mm.l2_op_lock); return err; } diff --git a/drivers/gpu/nvgpu/hal/cbc/cbc_tu104.c b/drivers/gpu/nvgpu/hal/cbc/cbc_tu104.c index 19c9fc83f..b7c06639f 100644 --- a/drivers/gpu/nvgpu/hal/cbc/cbc_tu104.c +++ b/drivers/gpu/nvgpu/hal/cbc/cbc_tu104.c @@ -30,7 +30,9 @@ #include #include +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include @@ -138,7 +140,9 @@ int tu104_cbc_ctrl(struct gk20a *g, enum nvgpu_cbc_op op, nvgpu_log_fn(g, " "); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_ltc_cbc_ctrl_start(g->name, op, min, max); +#endif if (g->cbc->compbit_store.mem.size == 0U) { return 0; @@ -216,7 +220,9 @@ int tu104_cbc_ctrl(struct gk20a *g, enum nvgpu_cbc_op op, nvgpu_mutex_release(&g->mm.l2_op_lock); } out: +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_ltc_cbc_ctrl_done(g->name); +#endif nvgpu_mutex_release(&g->mm.l2_op_lock); return err; } diff --git a/drivers/gpu/nvgpu/hal/fb/fb_gm20b.c b/drivers/gpu/nvgpu/hal/fb/fb_gm20b.c index 940ea4efb..262023bd8 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_gm20b.c +++ b/drivers/gpu/nvgpu/hal/fb/fb_gm20b.c @@ -22,7 +22,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include @@ -96,7 +98,9 @@ int gm20b_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb) nvgpu_mutex_acquire(&g->mm.tlb_lock); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_mm_tlb_invalidate(g->name); +#endif err = nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER); if (err != 0) { @@ -147,7 +151,9 @@ int gm20b_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb) } while (nvgpu_timeout_expired_msg(&timeout, "wait mmu invalidate") == 0); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_mm_tlb_invalidate_done(g->name); +#endif out: nvgpu_mutex_release(&g->mm.tlb_lock); diff --git a/drivers/gpu/nvgpu/hal/fb/fb_tu104.c b/drivers/gpu/nvgpu/hal/fb/fb_tu104.c index ce737fe4e..13fb81a53 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_tu104.c +++ b/drivers/gpu/nvgpu/hal/fb/fb_tu104.c @@ -20,7 +20,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include @@ -71,7 +73,9 @@ int fb_tu104_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb) nvgpu_mutex_acquire(&g->mm.tlb_lock); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_mm_tlb_invalidate(g->name); +#endif nvgpu_func_writel(g, func_priv_mmu_invalidate_pdb_r(), fb_mmu_invalidate_pdb_addr_f(addr_lo) | @@ -95,7 +99,9 @@ int fb_tu104_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb) } while (nvgpu_timeout_expired_msg(&timeout, "wait mmu invalidate") == 0); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_mm_tlb_invalidate_done(g->name); +#endif nvgpu_mutex_release(&g->mm.tlb_lock); return err; diff --git a/drivers/gpu/nvgpu/hal/fifo/mmu_fault_gk20a.c b/drivers/gpu/nvgpu/hal/fifo/mmu_fault_gk20a.c index 0f7239d8f..0b449a4a4 100644 --- a/drivers/gpu/nvgpu/hal/fifo/mmu_fault_gk20a.c +++ b/drivers/gpu/nvgpu/hal/fifo/mmu_fault_gk20a.c @@ -20,7 +20,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include #include @@ -200,6 +202,7 @@ void gk20a_fifo_mmu_fault_info_dump(struct gk20a *g, u32 engine_id, { gk20a_fifo_parse_mmu_fault_info(g, mmu_fault_id, mmufault); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_mmu_fault(mmufault->fault_addr, mmufault->fault_type, mmufault->access_type, @@ -208,6 +211,7 @@ void gk20a_fifo_mmu_fault_info_dump(struct gk20a *g, u32 engine_id, mmufault->client_type_desc, mmufault->client_id_desc, mmufault->fault_type_desc); +#endif nvgpu_err(g, "MMU fault @ address: 0x%llx %s", mmufault->fault_addr, fake_fault ? "[FAKE]" : ""); diff --git a/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.c b/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.c index d89e981d2..e90ab86be 100644 --- a/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.c +++ b/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.c @@ -22,7 +22,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include diff --git a/drivers/gpu/nvgpu/hal/ltc/ltc_tu104.c b/drivers/gpu/nvgpu/hal/ltc/ltc_tu104.c index e7e60e8de..0fa2ce4f3 100644 --- a/drivers/gpu/nvgpu/hal/ltc/ltc_tu104.c +++ b/drivers/gpu/nvgpu/hal/ltc/ltc_tu104.c @@ -26,7 +26,9 @@ #include #include +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include "ltc_tu104.h" diff --git a/drivers/gpu/nvgpu/hal/mm/cache/flush_gk20a.c b/drivers/gpu/nvgpu/hal/mm/cache/flush_gk20a.c index 6b6a5022b..0e0b1dc35 100644 --- a/drivers/gpu/nvgpu/hal/mm/cache/flush_gk20a.c +++ b/drivers/gpu/nvgpu/hal/mm/cache/flush_gk20a.c @@ -20,7 +20,9 @@ * DEALINGS IN THE SOFTWARE. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include @@ -62,7 +64,9 @@ int gk20a_mm_fb_flush(struct gk20a *g) guarantee that writes are to DRAM. This will be a sysmembar internal to the L2. */ +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_mm_fb_flush(g->name); +#endif nvgpu_writel(g, flush_fb_flush_r(), flush_fb_flush_pending_busy_f()); @@ -91,7 +95,9 @@ int gk20a_mm_fb_flush(struct gk20a *g) ret = -EBUSY; } +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_mm_fb_flush_done(g->name); +#endif nvgpu_mutex_release(&mm->l2_op_lock); @@ -106,7 +112,9 @@ static void gk20a_mm_l2_invalidate_locked(struct gk20a *g) struct nvgpu_timeout timeout; u32 retries = 200; +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_mm_l2_invalidate(g->name); +#endif if (g->ops.mm.get_flush_retries != NULL) { retries = g->ops.mm.get_flush_retries(g, NVGPU_FLUSH_L2_INV); @@ -139,7 +147,9 @@ static void gk20a_mm_l2_invalidate_locked(struct gk20a *g) nvgpu_warn(g, "l2_system_invalidate too many retries"); } +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_mm_l2_invalidate_done(g->name); +#endif } void gk20a_mm_l2_invalidate(struct gk20a *g) @@ -178,7 +188,9 @@ int gk20a_mm_l2_flush(struct gk20a *g, bool invalidate) nvgpu_mutex_acquire(&mm->l2_op_lock); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_mm_l2_flush(g->name); +#endif /* Flush all dirty lines from the L2 to DRAM. Lines are left in the L2 as clean, so subsequent reads might hit in the L2. */ @@ -201,7 +213,9 @@ int gk20a_mm_l2_flush(struct gk20a *g, bool invalidate) } while (nvgpu_timeout_expired_msg(&timeout, "l2_flush_dirty too many retries") == 0); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_mm_l2_flush_done(g->name); +#endif if (invalidate) { gk20a_mm_l2_invalidate_locked(g); diff --git a/drivers/gpu/nvgpu/os/linux/cde.c b/drivers/gpu/nvgpu/os/linux/cde.c index a2903f74d..9312a5a2b 100644 --- a/drivers/gpu/nvgpu/os/linux/cde.c +++ b/drivers/gpu/nvgpu/os/linux/cde.c @@ -21,7 +21,9 @@ #include #include +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include @@ -102,7 +104,9 @@ __must_hold(&cde_app->mutex) struct vm_gk20a *vm = ch->vm; struct nvgpu_cbc *cbc = g->cbc; +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_cde_remove_ctx(cde_ctx); +#endif /* release mapped memory */ gk20a_deinit_cde_img(cde_ctx); @@ -794,7 +798,9 @@ __releases(&cde_app->mutex) struct gk20a *g = &cde_ctx->l->g; nvgpu_log(g, gpu_dbg_cde_ctx, "releasing use on %p", cde_ctx); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_cde_release(cde_ctx); +#endif nvgpu_mutex_acquire(&cde_app->mutex); @@ -881,7 +887,9 @@ __must_hold(&cde_app->mutex) cde_ctx, cde_app->ctx_count, cde_app->ctx_usecount, cde_app->ctx_count_top); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_cde_get_context(cde_ctx); +#endif /* deleter work may be scheduled, but in_use prevents it */ cde_ctx->in_use = true; @@ -906,7 +914,9 @@ __must_hold(&cde_app->mutex) return cde_ctx; } +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_cde_get_context(cde_ctx); +#endif cde_ctx->in_use = true; cde_ctx->is_temporary = true; cde_app->ctx_usecount++; @@ -970,7 +980,9 @@ static struct gk20a_cde_ctx *gk20a_cde_allocate_context(struct nvgpu_os_linux *l gk20a_cde_ctx_deleter_fn); nvgpu_log(g, gpu_dbg_fn | gpu_dbg_cde_ctx, "cde: allocated %p", cde_ctx); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_cde_allocate_context(cde_ctx); +#endif return cde_ctx; } @@ -1265,7 +1277,9 @@ __releases(&cde_app->mutex) if (!channel_idle) return; +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_cde_finished_ctx_cb(cde_ctx); +#endif nvgpu_log(g, gpu_dbg_fn | gpu_dbg_cde_ctx, "cde: finished %p", cde_ctx); if (!cde_ctx->in_use) nvgpu_log_info(g, "double finish cde context %p on channel %p", diff --git a/drivers/gpu/nvgpu/os/linux/fecs_trace_linux.c b/drivers/gpu/nvgpu/os/linux/fecs_trace_linux.c index f872a5dc5..b48e45a92 100644 --- a/drivers/gpu/nvgpu/os/linux/fecs_trace_linux.c +++ b/drivers/gpu/nvgpu/os/linux/fecs_trace_linux.c @@ -18,7 +18,9 @@ #include #include #include +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include #include @@ -747,7 +749,9 @@ void nvgpu_gr_fecs_trace_add_tsg_reset(struct gk20a *g, struct nvgpu_tsg *tsg) nvgpu_gr_fecs_trace_write_entry(g, &entry); nvgpu_gr_fecs_trace_wake_up(g, 0); +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_channel_reset(~0, tsg->tsgid); +#endif } /* diff --git a/drivers/gpu/nvgpu/os/linux/intr.c b/drivers/gpu/nvgpu/os/linux/intr.c index f3f6b171d..9ca5d4307 100644 --- a/drivers/gpu/nvgpu/os/linux/intr.c +++ b/drivers/gpu/nvgpu/os/linux/intr.c @@ -11,7 +11,9 @@ * more details. */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include @@ -24,7 +26,9 @@ irqreturn_t nvgpu_intr_stall(struct gk20a *g) { u32 mc_intr_0; +#ifdef CONFIG_NVGPU_TRACE trace_mc_gk20a_intr_stall(g->name); +#endif if (!g->power_on) return IRQ_NONE; @@ -38,7 +42,9 @@ irqreturn_t nvgpu_intr_stall(struct gk20a *g) nvgpu_atomic_inc(&g->hw_irq_stall_count); +#ifdef CONFIG_NVGPU_TRACE trace_mc_gk20a_intr_stall_done(g->name); +#endif return IRQ_WAKE_THREAD; } @@ -49,7 +55,9 @@ irqreturn_t nvgpu_intr_thread_stall(struct gk20a *g) nvgpu_log(g, gpu_dbg_intr, "interrupt thread launched"); +#ifdef CONFIG_NVGPU_TRACE trace_mc_gk20a_intr_thread_stall(g->name); +#endif hw_irq_count = nvgpu_atomic_read(&g->hw_irq_stall_count); g->ops.mc.isr_stall(g); @@ -59,7 +67,9 @@ irqreturn_t nvgpu_intr_thread_stall(struct gk20a *g) nvgpu_cond_broadcast(&g->sw_irq_stall_last_handled_cond); +#ifdef CONFIG_NVGPU_TRACE trace_mc_gk20a_intr_thread_stall_done(g->name); +#endif return IRQ_HANDLED; } diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_as.c b/drivers/gpu/nvgpu/os/linux/ioctl_as.c index dc91251d4..e237222a2 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_as.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_as.c @@ -1,7 +1,7 @@ /* * GK20A Address Spaces * - * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -17,7 +17,9 @@ #include #include +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include @@ -359,7 +361,9 @@ long gk20a_as_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) nvgpu_speculation_barrier(); switch (cmd) { case NVGPU_AS_IOCTL_BIND_CHANNEL: +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_as_ioctl_bind_channel(g->name); +#endif err = gk20a_as_ioctl_bind_channel(as_share, (struct nvgpu_as_bind_channel_args *)buf); @@ -374,33 +378,45 @@ long gk20a_as_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) args.page_size = args32->page_size; args.flags = args32->flags; args.o_a.offset = args32->o_a.offset; +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_as_ioctl_alloc_space(g->name); +#endif err = gk20a_as_ioctl_alloc_space(as_share, &args); args32->o_a.offset = args.o_a.offset; break; } case NVGPU_AS_IOCTL_ALLOC_SPACE: +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_as_ioctl_alloc_space(g->name); +#endif err = gk20a_as_ioctl_alloc_space(as_share, (struct nvgpu_as_alloc_space_args *)buf); break; case NVGPU_AS_IOCTL_FREE_SPACE: +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_as_ioctl_free_space(g->name); +#endif err = gk20a_as_ioctl_free_space(as_share, (struct nvgpu_as_free_space_args *)buf); break; case NVGPU_AS_IOCTL_MAP_BUFFER_EX: +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_as_ioctl_map_buffer(g->name); +#endif err = gk20a_as_ioctl_map_buffer_ex(as_share, (struct nvgpu_as_map_buffer_ex_args *)buf); break; case NVGPU_AS_IOCTL_UNMAP_BUFFER: +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_as_ioctl_unmap_buffer(g->name); +#endif err = gk20a_as_ioctl_unmap_buffer(as_share, (struct nvgpu_as_unmap_buffer_args *)buf); break; case NVGPU_AS_IOCTL_GET_VA_REGIONS: +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_as_ioctl_get_va_regions(g->name); +#endif err = gk20a_as_ioctl_get_va_regions(as_share, (struct nvgpu_as_get_va_regions_args *)buf); break; diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_channel.c b/drivers/gpu/nvgpu/os/linux/ioctl_channel.c index f5162e8c6..1762f0e22 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_channel.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_channel.c @@ -16,7 +16,9 @@ * along with this program. If not, see . */ +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include #include @@ -56,6 +58,7 @@ (sizeof(struct gk20a_cs_snapshot_fifo) + \ sizeof(struct gk20a_cs_snapshot_fifo_entry) * 256) +#ifdef CONFIG_NVGPU_TRACE static const char *gr_gk20a_graphics_preempt_mode_name(u32 graphics_preempt_mode) { switch (graphics_preempt_mode) { @@ -77,7 +80,9 @@ static const char *gr_gk20a_compute_preempt_mode_name(u32 compute_preempt_mode) return "?"; } } +#endif +#ifdef CONFIG_NVGPU_TRACE static void gk20a_channel_trace_sched_param( void (*trace)(int chid, int tsgid, pid_t pid, u32 timeslice, u32 timeout, const char *interleave, @@ -99,6 +104,7 @@ static void gk20a_channel_trace_sched_param( gr_gk20a_compute_preempt_mode_name( nvgpu_gr_ctx_get_compute_preemption_mode(tsg->gr_ctx))); } +#endif /* * Although channels do have pointers back to the gk20a struct that they were @@ -423,7 +429,9 @@ int gk20a_channel_release(struct inode *inode, struct file *filp) goto channel_release; } +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_channel_release(dev_name(dev_from_gk20a(g))); +#endif nvgpu_channel_close(ch); gk20a_channel_free_error_notifiers(ch); @@ -459,7 +467,9 @@ static int __gk20a_channel_open(struct gk20a *g, if (!g) return -ENODEV; +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_channel_open(dev_name(dev_from_gk20a(g))); +#endif priv = nvgpu_kzalloc(g, sizeof(*priv)); if (!priv) { @@ -483,8 +493,10 @@ static int __gk20a_channel_open(struct gk20a *g, goto fail_busy; } +#ifdef CONFIG_NVGPU_TRACE gk20a_channel_trace_sched_param( trace_gk20a_channel_sched_defaults, ch); +#endif priv->g = g; priv->c = ch; @@ -1261,8 +1273,10 @@ long gk20a_channel_ioctl(struct file *filp, nvgpu_log(g, gpu_dbg_gpu_dbg, "setting timeout (%d ms) for chid %d", timeout, ch->chid); ch->ctxsw_timeout_max_ms = timeout; +#ifdef CONFIG_NVGPU_TRACE gk20a_channel_trace_sched_param( trace_gk20a_channel_set_timeout, ch); +#endif break; } case NVGPU_IOCTL_CHANNEL_SET_TIMEOUT_EX: @@ -1276,8 +1290,10 @@ long gk20a_channel_ioctl(struct file *filp, timeout, ch->chid); ch->ctxsw_timeout_max_ms = timeout; ch->ctxsw_timeout_debug_dump = ctxsw_timeout_debug_dump; +#ifdef CONFIG_NVGPU_TRACE gk20a_channel_trace_sched_param( trace_gk20a_channel_set_timeout, ch); +#endif break; } case NVGPU_IOCTL_CHANNEL_GET_TIMEDOUT: diff --git a/drivers/gpu/nvgpu/os/linux/linux-channel.c b/drivers/gpu/nvgpu/os/linux/linux-channel.c index cc277be6b..f9c0a9be3 100644 --- a/drivers/gpu/nvgpu/os/linux/linux-channel.c +++ b/drivers/gpu/nvgpu/os/linux/linux-channel.c @@ -38,7 +38,9 @@ #include #include +#ifdef CONFIG_NVGPU_TRACE #include +#endif #include #include "sync_sema_android.h" @@ -616,6 +618,7 @@ static void trace_write_pushbuffer(struct nvgpu_channel *c, } if (mem) { +#ifdef CONFIG_NVGPU_TRACE u32 i; /* * Write in batches of 128 as there seems to be a limit @@ -629,6 +632,7 @@ static void trace_write_pushbuffer(struct nvgpu_channel *c, offset + i * sizeof(u32), mem); } +#endif dma_buf_vunmap(dmabuf, mem); } } diff --git a/drivers/gpu/nvgpu/os/linux/module.c b/drivers/gpu/nvgpu/os/linux/module.c index e1b718bff..27011793c 100644 --- a/drivers/gpu/nvgpu/os/linux/module.c +++ b/drivers/gpu/nvgpu/os/linux/module.c @@ -85,7 +85,9 @@ #define GK20A_WAIT_FOR_IDLE_MS 2000 #define CREATE_TRACE_POINTS +#ifdef CONFIG_NVGPU_TRACE #include +#endif static int nvgpu_kernel_shutdown_notification(struct notifier_block *nb, unsigned long event, void *unused) @@ -371,7 +373,9 @@ int gk20a_pm_finalize_poweron(struct device *dev) if (g->power_on) goto done; +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_finalize_poweron(dev_name(dev)); +#endif /* Increment platform power refcount */ if (platform->busy) { @@ -445,7 +449,9 @@ int gk20a_pm_finalize_poweron(struct device *dev) platform->initscale(dev); } +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_finalize_poweron_done(dev_name(dev)); +#endif enable_irq(g->irq_stall); if (g->irq_stall != g->irq_nonstall) @@ -1006,7 +1012,9 @@ static int gk20a_pm_unrailgate(struct device *dev) g->pstats.railgating_cycle_count++; #endif +#ifdef CONFIG_NVGPU_TRACE trace_gk20a_pm_unrailgate(dev_name(dev)); +#endif nvgpu_mutex_acquire(&platform->railgate_lock); ret = platform->unrailgate(dev);