mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 09:12:24 +03:00
gpu: nvgpu: ga10x: update pdiv_duration for thermal
To keep pdiv_duration at 15usec between steps at 102MHz utilsclk, update stepping duration value from 0xBF4 to 0x5FA for ga10x. Bug 200757274 Change-Id: I333a5b0b35307402a734a7eafc4ab13d20316cd1 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2584539 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
mobile promotions
parent
88293ee42d
commit
d255c64f50
@@ -1248,6 +1248,8 @@ static const struct gops_mm ga100_ops_mm = {
|
|||||||
|
|
||||||
static const struct gops_therm ga100_ops_therm = {
|
static const struct gops_therm ga100_ops_therm = {
|
||||||
.therm_max_fpdiv_factor = ga10b_therm_max_fpdiv_factor,
|
.therm_max_fpdiv_factor = ga10b_therm_max_fpdiv_factor,
|
||||||
|
.therm_grad_stepping_pdiv_duration =
|
||||||
|
ga10b_therm_grad_stepping_pdiv_duration,
|
||||||
.init_therm_support = nvgpu_init_therm_support,
|
.init_therm_support = nvgpu_init_therm_support,
|
||||||
/* PROD values match with H/W INIT values */
|
/* PROD values match with H/W INIT values */
|
||||||
.init_elcg_mode = gv11b_therm_init_elcg_mode,
|
.init_elcg_mode = gv11b_therm_init_elcg_mode,
|
||||||
|
|||||||
@@ -1236,6 +1236,8 @@ static const struct gops_mm ga10b_ops_mm = {
|
|||||||
|
|
||||||
static const struct gops_therm ga10b_ops_therm = {
|
static const struct gops_therm ga10b_ops_therm = {
|
||||||
.therm_max_fpdiv_factor = ga10b_therm_max_fpdiv_factor,
|
.therm_max_fpdiv_factor = ga10b_therm_max_fpdiv_factor,
|
||||||
|
.therm_grad_stepping_pdiv_duration =
|
||||||
|
ga10b_therm_grad_stepping_pdiv_duration,
|
||||||
.init_therm_support = nvgpu_init_therm_support,
|
.init_therm_support = nvgpu_init_therm_support,
|
||||||
.init_therm_setup_hw = gv11b_init_therm_setup_hw,
|
.init_therm_setup_hw = gv11b_init_therm_setup_hw,
|
||||||
.init_elcg_mode = gv11b_therm_init_elcg_mode,
|
.init_elcg_mode = gv11b_therm_init_elcg_mode,
|
||||||
|
|||||||
@@ -1083,6 +1083,8 @@ static const struct gops_mm gv11b_ops_mm = {
|
|||||||
|
|
||||||
static const struct gops_therm gv11b_ops_therm = {
|
static const struct gops_therm gv11b_ops_therm = {
|
||||||
.therm_max_fpdiv_factor = gv11b_therm_max_fpdiv_factor,
|
.therm_max_fpdiv_factor = gv11b_therm_max_fpdiv_factor,
|
||||||
|
.therm_grad_stepping_pdiv_duration =
|
||||||
|
gv11b_therm_grad_stepping_pdiv_duration,
|
||||||
.init_therm_support = nvgpu_init_therm_support,
|
.init_therm_support = nvgpu_init_therm_support,
|
||||||
.init_therm_setup_hw = gv11b_init_therm_setup_hw,
|
.init_therm_setup_hw = gv11b_init_therm_setup_hw,
|
||||||
.init_elcg_mode = gv11b_therm_init_elcg_mode,
|
.init_elcg_mode = gv11b_therm_init_elcg_mode,
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
|
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
@@ -25,6 +25,7 @@
|
|||||||
struct gk20a;
|
struct gk20a;
|
||||||
|
|
||||||
u32 ga10b_therm_max_fpdiv_factor(void);
|
u32 ga10b_therm_max_fpdiv_factor(void);
|
||||||
|
u32 ga10b_therm_grad_stepping_pdiv_duration(void);
|
||||||
int ga10b_elcg_init_idle_filters(struct gk20a *g);
|
int ga10b_elcg_init_idle_filters(struct gk20a *g);
|
||||||
|
|
||||||
#endif /* THERM_GA10B_H */
|
#endif /* THERM_GA10B_H */
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
|
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
@@ -34,6 +34,12 @@
|
|||||||
#include <nvgpu/hw/ga10b/hw_therm_ga10b.h>
|
#include <nvgpu/hw/ga10b/hw_therm_ga10b.h>
|
||||||
|
|
||||||
u32 ga10b_therm_max_fpdiv_factor(void)
|
u32 ga10b_therm_max_fpdiv_factor(void)
|
||||||
|
{
|
||||||
|
/* minimum duration between steps 15usec * UTILSCLK@102 MHz */
|
||||||
|
return 0x5FA;
|
||||||
|
}
|
||||||
|
|
||||||
|
u32 ga10b_therm_grad_stepping_pdiv_duration(void)
|
||||||
{
|
{
|
||||||
return therm_grad_stepping_table_slowdown_factor0_fpdiv_by31_f();
|
return therm_grad_stepping_table_slowdown_factor0_fpdiv_by31_f();
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
|
* Copyright (c) 2017-2021, NVIDIA CORPORATION. All rights reserved.
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
@@ -27,5 +27,6 @@ int gv11b_elcg_init_idle_filters(struct gk20a *g);
|
|||||||
int gv11b_init_therm_setup_hw(struct gk20a *g);
|
int gv11b_init_therm_setup_hw(struct gk20a *g);
|
||||||
void gv11b_therm_init_elcg_mode(struct gk20a *g, u32 mode, u32 engine);
|
void gv11b_therm_init_elcg_mode(struct gk20a *g, u32 mode, u32 engine);
|
||||||
u32 gv11b_therm_max_fpdiv_factor(void);
|
u32 gv11b_therm_max_fpdiv_factor(void);
|
||||||
|
u32 gv11b_therm_grad_stepping_pdiv_duration(void);
|
||||||
|
|
||||||
#endif /* THERM_GV11B_H */
|
#endif /* THERM_GV11B_H */
|
||||||
|
|||||||
@@ -1,7 +1,7 @@
|
|||||||
/*
|
/*
|
||||||
* GV11B Therm
|
* GV11B Therm
|
||||||
*
|
*
|
||||||
* Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved.
|
* Copyright (c) 2015-2021, NVIDIA CORPORATION. All rights reserved.
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
@@ -191,3 +191,9 @@ u32 gv11b_therm_max_fpdiv_factor(void)
|
|||||||
{
|
{
|
||||||
return therm_grad_stepping_table_slowdown_factor0_fpdiv_by32_f();
|
return therm_grad_stepping_table_slowdown_factor0_fpdiv_by32_f();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
u32 gv11b_therm_grad_stepping_pdiv_duration(void)
|
||||||
|
{
|
||||||
|
/* minimum duration between steps 15usec * UTILSCLK@204 MHz */
|
||||||
|
return 0xBF4;
|
||||||
|
}
|
||||||
|
|||||||
@@ -137,6 +137,7 @@ struct gops_therm {
|
|||||||
void (*therm_debugfs_init)(struct gk20a *g);
|
void (*therm_debugfs_init)(struct gk20a *g);
|
||||||
#endif
|
#endif
|
||||||
u32 (*therm_max_fpdiv_factor)(void);
|
u32 (*therm_max_fpdiv_factor)(void);
|
||||||
|
u32 (*therm_grad_stepping_pdiv_duration)(void);
|
||||||
void (*get_internal_sensor_curr_temp)(struct gk20a *g, u32 *temp_f24_8);
|
void (*get_internal_sensor_curr_temp)(struct gk20a *g, u32 *temp_f24_8);
|
||||||
/** @endcond DOXYGEN_SHOULD_SKIP_THIS */
|
/** @endcond DOXYGEN_SHOULD_SKIP_THIS */
|
||||||
};
|
};
|
||||||
|
|||||||
Reference in New Issue
Block a user