gpu: nvgpu: gv10x volt rail boardobj changes

- Created volt ops under pmu_ver to support volt_set_voltage,
  volt_get_voltage & volt_send_load_cmd_to_pmu.
- Renamed volt load, set_voltage & get_voltage gp10x method names.
- Added new volt load, set_voltage & get_voltage methods for gv10x
  using RPC & added code to handle ack in pmu_rpc_handler() along
  with struct rail_list changes.
- Updated volt ops of gp106 & gv100 to point to respective methods.
- Added member volt_dev_idx_ipc_vmin & volt_scale_exp_pwr_equ_idx to
  "struct nv_pmu_volt_volt_rail_boardobj_set" & "struct voltage_rail"
  made changes to update members as needed.
- Added member volt_scale_exp_pwr_equ_idx to
  "struct vbios_voltage_rail_table_1x_entry" to read
  value from VBIOS table & update rail boardobj set interface.
- Defines for volt RPC "NV_PMU_RPC_ID_VOLT_*"
- Define struct's volt load, set_voltage & get_voltage to execute
   volt RPC.

Change-Id: I4a41adcf7536468beaa8a73f551b1d608aabd161
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1659728
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2018-02-14 14:31:01 +05:30
committed by mobile promotions
parent e77ec1a98e
commit d3f96dfa96
11 changed files with 270 additions and 15 deletions

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -34,8 +34,10 @@ u8 volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain)
{
switch (g->perf_pmu.volt.volt_rail_metadata.volt_domain_hal) {
case CTRL_VOLT_DOMAIN_HAL_GP10X_SINGLE_RAIL:
if (volt_domain == CTRL_BOARDOBJ_IDX_INVALID)
switch (volt_domain) {
case CTRL_VOLT_DOMAIN_LOGIC:
return 0;
}
break;
case CTRL_VOLT_DOMAIN_HAL_GP10X_SPLIT_RAIL:
switch (volt_domain) {
@@ -63,6 +65,22 @@ u32 volt_rail_volt_dev_register(struct gk20a *g, struct voltage_rail
status = -EINVAL;
goto exit;
}
} else if (operation_type ==
CTRL_VOLT_VOLT_DEVICE_OPERATION_TYPE_IPC_VMIN) {
if (pvolt_rail->volt_dev_idx_ipc_vmin ==
CTRL_BOARDOBJ_IDX_INVALID) {
pvolt_rail->volt_dev_idx_ipc_vmin = volt_dev_idx;
/*
* Exit on purpose as we do not want to register
* IPC_VMIN device against the rail to avoid
* setting current voltage instead of
* IPC Vmin voltage.
*/
goto exit;
} else {
status = -EINVAL;
goto exit;
}
} else {
goto exit;
}
@@ -136,6 +154,9 @@ static u32 volt_rail_init_pmudata_super(struct gk20a *g,
prail->volt_margin_limit_vfe_equ_idx;
rail_pmu_data->pwr_equ_idx = prail->pwr_equ_idx;
rail_pmu_data->volt_dev_idx_default = prail->volt_dev_idx_default;
rail_pmu_data->volt_scale_exp_pwr_equ_idx =
prail->volt_scale_exp_pwr_equ_idx;
rail_pmu_data->volt_dev_idx_ipc_vmin = prail->volt_dev_idx_ipc_vmin;
for (i = 0; i < CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES; i++) {
rail_pmu_data->volt_delta_uv[i] = prail->volt_delta_uv[i] +
@@ -187,6 +208,8 @@ static struct voltage_rail *construct_volt_rail(struct gk20a *g, void *pargs)
ptemp_rail->vmin_limit_vfe_equ_idx;
board_obj_volt_rail_ptr->volt_margin_limit_vfe_equ_idx =
ptemp_rail->volt_margin_limit_vfe_equ_idx;
board_obj_volt_rail_ptr->volt_scale_exp_pwr_equ_idx =
ptemp_rail->volt_scale_exp_pwr_equ_idx;
gk20a_dbg_info("Done");
@@ -284,6 +307,14 @@ static u32 volt_get_volt_rail_table(struct gk20a *g,
rail_type_data.volt_rail.ov_limit_vfe_equ_idx =
(u8)entry.ov_limit_vfe_equ_idx;
if (header.table_entry_size >=
NV_VBIOS_VOLTAGE_RAIL_1X_ENTRY_SIZE_0C)
rail_type_data.volt_rail.volt_scale_exp_pwr_equ_idx =
(u8)entry.volt_scale_exp_pwr_equ_idx;
else
rail_type_data.volt_rail.volt_scale_exp_pwr_equ_idx =
CTRL_BOARDOBJ_IDX_INVALID;
if (header.table_entry_size >=
NV_VBIOS_VOLTAGE_RAIL_1X_ENTRY_SIZE_0B)
rail_type_data.volt_rail.volt_margin_limit_vfe_equ_idx =