From d419005222a3d93351c4a053441a87f07f9adee9 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Tue, 15 Sep 2020 16:23:12 +0530 Subject: [PATCH] gpu: nvgpu: NULL check config->gpc_zcb_count in MIG mode config->gpc_zcb_count is not allocated in MIG mode. Add NULL checks before accessing this in case it is not allocated. Jira NVGPU-5648 Change-Id: I4c1169772310ae4776063a91ba298af9e5bfe874 Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2413840 Tested-by: mobile promotions Reviewed-by: mobile promotions --- drivers/gpu/nvgpu/common/gr/gr_config.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/nvgpu/common/gr/gr_config.c b/drivers/gpu/nvgpu/common/gr/gr_config.c index b4ab011c3..4eb0f7a5c 100644 --- a/drivers/gpu/nvgpu/common/gr/gr_config.c +++ b/drivers/gpu/nvgpu/common/gr/gr_config.c @@ -119,7 +119,8 @@ static void gr_config_log_info(struct gk20a *g, #ifdef CONFIG_NVGPU_GRAPHICS for (gpc_index = 0; gpc_index < config->gpc_count; gpc_index++) { nvgpu_log(g, gpu_dbg_info | gpu_dbg_gr, "gpc_zcb_count[%d] : %d", - gpc_index, config->gpc_zcb_count[gpc_index]); + gpc_index, config->gpc_zcb_count != NULL ? + config->gpc_zcb_count[gpc_index] : 0U); } #endif for (gpc_index = 0; gpc_index < config->gpc_count; gpc_index++) { @@ -167,14 +168,18 @@ static void gr_config_set_gpc_mask(struct gk20a *g, static bool gr_config_alloc_valid(struct nvgpu_gr_config *config) { if ((config->gpc_tpc_count == NULL) || (config->gpc_tpc_mask == NULL) || -#ifdef CONFIG_NVGPU_GRAPHICS - (config->gpc_zcb_count == NULL) || -#endif (config->gpc_ppc_count == NULL) || (config->gpc_skip_mask == NULL)) { return false; } +#ifdef CONFIG_NVGPU_GRAPHICS + if (!nvgpu_is_enabled(config->g, NVGPU_SUPPORT_MIG) && + (config->gpc_zcb_count == NULL)) { + return false; + } +#endif + return true; }