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gpu: nvgpu: add PDI reporting for GP10B (Linux)

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Read the T186 SoC PDI fuse registers to retrieve the per-device
identifier for GP10B.

Bug 2957580

Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Change-Id: Ie5031a005ca251636614d27c2dc77bddfce0ea21
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2350930
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sami Kiminki
2020-05-18 17:11:31 +03:00
committed by Alex Waterman
parent 872c043ad6
commit d44960d424
4 changed files with 47 additions and 0 deletions
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2
drivers/gpu/nvgpu/hal/init/hal_gp10b.c
View File

@@ -1217,6 +1217,8 @@ static const struct gpu_ops gp10b_ops = {
.read_vin_cal_gain_offset_fuse = NULL,
.read_gcplex_config_fuse =
nvgpu_tegra_fuse_read_gcplex_config_fuse,
.read_per_device_identifier =
nvgpu_tegra_fuse_read_per_device_identifier,
},
.top = {
.device_info_parse_enum = gm20b_device_info_parse_enum,

19
drivers/gpu/nvgpu/include/nvgpu/fuse.h
View File

@@ -105,6 +105,18 @@ void nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(struct gk20a *g, u32 val);
*/
int nvgpu_tegra_fuse_read_gcplex_config_fuse(struct gk20a *g, u32 *val);
/**
* @brief - Reads the per-device identifier fuses.
*
* @param g [in] - GPU super structure.
* @param pdi [out] - Per-device identifier
*
* The per-device identifier fuses are FUSE_PDI0 and FUSE_PDI1.
*
* @return 0 on success
*/
int nvgpu_tegra_fuse_read_per_device_identifier(struct gk20a *g, u64 *pdi);
#else /* CONFIG_NVGPU_TEGRA_FUSE */
#ifdef CONFIG_NVGPU_NON_FUSA
@@ -150,5 +162,12 @@ static inline int nvgpu_tegra_fuse_read_gcplex_config_fuse(struct gk20a *g,
return 0;
}
static inline int nvgpu_tegra_fuse_read_per_device_identifier(struct gk20a *g, u64 *pdi)
{
*pdi = 0U;
return 0;
}
#endif /* CONFIG_NVGPU_TEGRA_FUSE */
#endif /* NVGPU_FUSE_H */

19
drivers/gpu/nvgpu/os/linux/fuse.c
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@@ -55,3 +55,22 @@ int nvgpu_tegra_fuse_read_reserved_calib(struct gk20a *g, u32 *val)
{
return tegra_fuse_readl(FUSE_RESERVED_CALIB0_0, val);
}
int nvgpu_tegra_fuse_read_per_device_identifier(struct gk20a *g, u64 *pdi)
{
u32 lo = 0U;
u32 hi = 0U;
int err;
err = tegra_fuse_readl(FUSE_PDI0, &lo);
if (err)
return err;
err = tegra_fuse_readl(FUSE_PDI1, &hi);
if (err)
return err;
*pdi = ((u64)lo) | (((u64)hi) << 32);
return 0;
}

7
drivers/gpu/nvgpu/os/posix/fuse.c
View File

@@ -115,3 +115,10 @@ int nvgpu_tegra_fuse_read_reserved_calib(struct gk20a *g, u32 *val)
return p->callbacks->tegra_fuse_readl(FUSE_RESERVED_CALIB0_0, val);
}
#endif
int nvgpu_tegra_fuse_read_per_device_identifier(struct gk20a *g, u64 *pdi)
{
*pdi = 0;
return 0;
}