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gpu: nvgpu: use coherent aperture for coherent buffers

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Use sysmem_coherent aperture if the buffer mappings are requested
to be IO coherent. Use sysmem_noncoherent aperture otherwise. This
is implemented by adding a new coherent field to the GMMU attrs
struct.

Jira GPUT19X-17
Bug 1651331
Bug 200283998

Change-Id: I5cfb71b5913d4db50ebf10331b19f5a4216456bf
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master/r/1514438
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
This commit is contained in:
Deepak Nibade
2017-07-05 15:41:15 +05:30
committed by mobile promotions
parent 8bdb74786c
commit d479a781c6
5 changed files with 11 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/common/mm/gmmu.c
View File

@@ -747,6 +747,7 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm,
.rw_flag = rw_flag,
.sparse = sparse,
.priv = priv,
.coherent = flags & NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT,
.valid = !(flags & NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE),
.aperture = aperture
};
@@ -805,6 +806,7 @@ void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm,
.rw_flag = rw_flag,
.sparse = sparse,
.priv = 0,
.coherent = 0,
.valid = 0,
.aperture = APERTURE_INVALID,
};

5
drivers/gpu/nvgpu/gp10b/mm_gp10b.c
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@@ -230,7 +230,10 @@ static void __update_pte(struct vm_gk20a *vm,
u32 pte_addr = attrs->aperture == APERTURE_SYSMEM ?
gmmu_new_pte_address_sys_f(phys_shifted) :
gmmu_new_pte_address_vid_f(phys_shifted);
u32 pte_tgt = __nvgpu_aperture_mask(g, attrs->aperture,
u32 pte_tgt = __nvgpu_aperture_mask(g,
attrs->aperture,
attrs->coherent ?
gmmu_new_pte_aperture_sys_mem_coh_f() :
gmmu_new_pte_aperture_sys_mem_ncoh_f(),
gmmu_new_pte_aperture_video_memory_f());

2
drivers/gpu/nvgpu/include/nvgpu/gmmu.h
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@@ -149,6 +149,7 @@ struct nvgpu_gmmu_pd {
* rw_flag: Flag from enum gk20a_mem_rw_flag
* sparse: Set if the mapping should be sparse.
* priv: Privilidged mapping.
* coherent: Set if the mapping should be IO coherent.
* valid: Set if the PTE should be marked valid.
* aperture: VIDMEM or SYSMEM.
* debug: When set print debugging info.
@@ -166,6 +167,7 @@ struct nvgpu_gmmu_attrs {
int rw_flag;
bool sparse;
bool priv;
bool coherent;
bool valid;
enum nvgpu_aperture aperture;
bool debug;

6
include/uapi/linux/nvgpu-t18x.h
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@@ -24,12 +24,6 @@
#ifndef _UAPI__LINUX_NVGPU_T18X_IOCTL_H_
#define _UAPI__LINUX_NVGPU_T18X_IOCTL_H_
/*
* this flag is used in struct nvgpu_as_map_buffer_ex_args
* to specify IO coherence
*/
#define NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT (1 << 4)
/*
* this flag is used in struct nvgpu_alloc_gpfifo_args
* to enable re-playable faults for that channel

1
include/uapi/linux/nvgpu.h
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@@ -1744,6 +1744,7 @@ struct nvgpu_as_map_buffer_args {
__u32 flags; /* in/out */
#define NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET (1 << 0)
#define NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE (1 << 2)
#define NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT (1 << 4)
#define NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE (1 << 5)
#define NVGPU_AS_MAP_BUFFER_FLAGS_MAPPABLE_COMPBITS (1 << 6)
__u32 reserved; /* in */