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gpu: nvgpu: store usermode regs bus addr directly
Instead of just the base address of the main register range, store (also) the base address of usermode area. All regs may not be always available; on vgpu guests we have only the usermode regs. Store the usermode addr we get from a platform resource directly in gv11b_vgpu_probe() for vgpu. In that case the main reg addr is unset. The base address is computed in gk20a_pm_finalize_poweron() for native environments; when the reg addr is read from a resource, the chip is still unknown and as such the HAL op for reading the usermode base offset is unavailable. Bug 200145225 Bug 200467197 Change-Id: I8855bb54a6456eb63b69559c84398f7eeaec3513 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1951524 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -286,6 +286,16 @@ int gk20a_pm_finalize_poweron(struct device *dev)
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if (err)
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goto done;
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if (g->ops.fifo.usermode_base != NULL) {
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/*
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* Native has regs_bus_addr set but not this one yet. Virtual
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* gets usermode_regs_bus_addr directly from chip-specific
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* probe, and regs_bus_addr stays unset.
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*/
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l->usermode_regs_bus_addr = l->regs_bus_addr +
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g->ops.fifo.usermode_base(g);
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}
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err = nvgpu_finalize_poweron_linux(l);
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if (err)
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goto done;
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