From d5d31e5b17d50ba2b7623029f78df6e3caaa7dbe Mon Sep 17 00:00:00 2001 From: Seshendra Gadagottu Date: Tue, 13 Aug 2019 16:39:21 -0700 Subject: [PATCH] gpu: nvnpu: ltc: fix misra-c rule 8.6 violations Fix rule 8.6 misra violation in ltc code by enclosing following functions defs under CONFIG_NVGPU_FALCON_NON_FUSA switch. gp10b_ltc_intr_configure gp10b_ltc_intr_isr gm20b_determine_L2_size_bytes gm20b_ltc_set_enabled gm20b_ltc_init_fs_state Added following functions defs under CONFIG_NVGPU_INJECT_HWERR switch. gv11b_ltc_get_err_desc gv11b_ltc_inject_ecc_error Also added hal initializations under relevant switch. JIRA NVGPU-3872 Change-Id: I6800ae4a8fcd91e534df97e8db7770f0e4e9112a Signed-off-by: Seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/2174827 GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/init/hal_gm20b.c | 4 +++- drivers/gpu/nvgpu/hal/init/hal_gp10b.c | 2 ++ drivers/gpu/nvgpu/hal/ltc/intr/ltc_intr_gp10b.h | 4 +++- drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.h | 8 +++++--- drivers/gpu/nvgpu/hal/ltc/ltc_gv11b.h | 4 +++- 5 files changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c index d214e6c8d..aca80f1af 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c @@ -143,10 +143,12 @@ static const struct gpu_ops gm20b_ops = { .ltc = { .init_ltc_support = nvgpu_init_ltc_support, .ltc_remove_support = nvgpu_ltc_remove_support, + .flush = gm20b_flush_ltc, +#ifdef CONFIG_NVGPU_FALCON_NON_FUSA .determine_L2_size_bytes = gm20b_determine_L2_size_bytes, .init_fs_state = gm20b_ltc_init_fs_state, - .flush = gm20b_flush_ltc, .set_enabled = gm20b_ltc_set_enabled, +#endif #ifdef CONFIG_NVGPU_GRAPHICS .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry, .set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry, diff --git a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c index 42eb6b8c3..48a824f5a 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c @@ -188,8 +188,10 @@ static const struct gpu_ops gp10b_ops = { .split_ltc_broadcast_addr = gm20b_ltc_split_ltc_broadcast_addr, #endif /* CONFIG_NVGPU_DEBUGGER */ .intr = { +#ifdef CONFIG_NVGPU_FALCON_NON_FUSA .configure = gp10b_ltc_intr_configure, .isr = gp10b_ltc_intr_isr, +#endif .en_illegal_compstat = NULL, }, }, diff --git a/drivers/gpu/nvgpu/hal/ltc/intr/ltc_intr_gp10b.h b/drivers/gpu/nvgpu/hal/ltc/intr/ltc_intr_gp10b.h index e2a9abc92..61f22b1c5 100644 --- a/drivers/gpu/nvgpu/hal/ltc/intr/ltc_intr_gp10b.h +++ b/drivers/gpu/nvgpu/hal/ltc/intr/ltc_intr_gp10b.h @@ -29,8 +29,10 @@ struct gk20a; +void gp10b_ltc_intr_handle_lts_interrupts(struct gk20a *g, u32 ltc, u32 slice); +#ifdef CONFIG_NVGPU_FALCON_NON_FUSA void gp10b_ltc_intr_configure(struct gk20a *g); void gp10b_ltc_intr_isr(struct gk20a *g, u32 ltc); -void gp10b_ltc_intr_handle_lts_interrupts(struct gk20a *g, u32 ltc, u32 slice); +#endif #endif diff --git a/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.h b/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.h index da8f26582..31b2487b9 100644 --- a/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.h +++ b/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.h @@ -29,7 +29,12 @@ struct gk20a; +void gm20b_flush_ltc(struct gk20a *g); +#ifdef CONFIG_NVGPU_FALCON_NON_FUSA u64 gm20b_determine_L2_size_bytes(struct gk20a *g); +void gm20b_ltc_set_enabled(struct gk20a *g, bool enabled); +void gm20b_ltc_init_fs_state(struct gk20a *g); +#endif #ifdef CONFIG_NVGPU_GRAPHICS void gm20b_ltc_set_zbc_color_entry(struct gk20a *g, u32 *color_l2, @@ -38,9 +43,6 @@ void gm20b_ltc_set_zbc_depth_entry(struct gk20a *g, u32 depth_val, u32 index); #endif /* CONFIG_NVGPU_GRAPHICS */ -void gm20b_ltc_set_enabled(struct gk20a *g, bool enabled); -void gm20b_ltc_init_fs_state(struct gk20a *g); -void gm20b_flush_ltc(struct gk20a *g); #ifdef CONFIG_NVGPU_DEBUGGER bool gm20b_ltc_pri_is_ltc_addr(struct gk20a *g, u32 addr); bool gm20b_ltc_is_ltcs_ltss_addr(struct gk20a *g, u32 addr); diff --git a/drivers/gpu/nvgpu/hal/ltc/ltc_gv11b.h b/drivers/gpu/nvgpu/hal/ltc/ltc_gv11b.h index 7ca5459c9..ca2708f95 100644 --- a/drivers/gpu/nvgpu/hal/ltc/ltc_gv11b.h +++ b/drivers/gpu/nvgpu/hal/ltc/ltc_gv11b.h @@ -30,14 +30,16 @@ struct gk20a; struct nvgpu_hw_err_inject_info; struct nvgpu_hw_err_inject_info_desc; +void gv11b_ltc_init_fs_state(struct gk20a *g); #ifdef CONFIG_NVGPU_GRAPHICS void gv11b_ltc_set_zbc_stencil_entry(struct gk20a *g, u32 stencil_depth, u32 index); #endif /* CONFIG_NVGPU_GRAPHICS */ -void gv11b_ltc_init_fs_state(struct gk20a *g); +#ifdef CONFIG_NVGPU_INJECT_HWERR struct nvgpu_hw_err_inject_info_desc * gv11b_ltc_get_err_desc(struct gk20a *g); int gv11b_ltc_inject_ecc_error(struct gk20a *g, struct nvgpu_hw_err_inject_info *err, u32 error_info); +#endif #endif