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gpu: nvgpu: add secure gpccs boot support

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bug 200080684

keeping it disabled by default
also trimming the code by removing redundant
variable to check recovery. pmu quick wait
now checks only for irqs which are serviced
by kernel. requests pmu to bit bang gpccs
ucode.

Change-Id: I12ef23d6d59b507e86a129b69eab65b21d0438c6
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/729622
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Vijayakumar
2015-04-09 16:47:13 +05:30
committed by Ishan Mittal
parent 6a5cc11171
commit d65a93b80c
8 changed files with 175 additions and 56 deletions
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4
drivers/gpu/nvgpu/gk20a/gk20a.h
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@@ -377,15 +377,15 @@ struct gpu_ops {
int (*pmu_setup_hw_and_bootstrap)(struct gk20a *g);
int (*pmu_setup_elpg)(struct gk20a *g);
int (*init_wpr_region)(struct gk20a *g);
bool lspmuwprinitdone;
u32 lspmuwprinitdone;
bool fecsbootstrapdone;
u32 fecsrecoveryinprogress;
} pmu;
struct {
int (*init_clk_support)(struct gk20a *g);
int (*suspend_clk_support)(struct gk20a *g);
} clk;
bool privsecurity;
bool securegpccs;
struct {
const struct regop_offset_range* (
*get_global_whitelist_ranges)(void);