diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index b4d8f48b6..3ee9188c4 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -936,6 +936,8 @@ struct gk20a { #ifdef CONFIG_NVGPU_ENABLE_MISC_EC bool enable_polling; #endif + /** Check if igpu is available as pci device. */ + bool is_pci_igpu; }; /** diff --git a/drivers/gpu/nvgpu/os/linux/pci.c b/drivers/gpu/nvgpu/os/linux/pci.c index d7c988ec6..ee27c60e2 100644 --- a/drivers/gpu/nvgpu/os/linux/pci.c +++ b/drivers/gpu/nvgpu/os/linux/pci.c @@ -115,6 +115,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { .dma_mask = DMA_BIT_MASK(40), .hardcode_sw_threshold = false, .unified_memory = false, + .is_pci_igpu = false, }, /* 0x1eba, 0x1efa, 0x1ebb, 0x1efb */ @@ -156,6 +157,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { #ifdef CONFIG_TEGRA_GK20A_NVHOST .has_syncpoints = true, #endif + .is_pci_igpu = false, }, /* 0x1eb0 (RTX 5000 : TU104 based) */ @@ -195,6 +197,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { #ifdef CONFIG_TEGRA_GK20A_NVHOST .has_syncpoints = true, #endif + .is_pci_igpu = false, }, /* PG209 */ { @@ -234,6 +237,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { #ifdef CONFIG_TEGRA_GK20A_NVHOST .has_syncpoints = true, #endif + .is_pci_igpu = false, }, }; @@ -544,6 +548,9 @@ static int nvgpu_pci_probe(struct pci_dev *pdev, (u8 *)&nvgpu_pci_device[device_index], sizeof(struct gk20a_platform)); + + g->is_pci_igpu = platform->is_pci_igpu; + nvgpu_info(g, "is_pci_igpu: %s", g->is_pci_igpu ? "true" : "false"); pci_set_drvdata(pdev, platform); err = nvgpu_init_errata_flags(g); diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h index 057773552..54a71d09f 100644 --- a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h +++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h @@ -1,7 +1,7 @@ /* * GK20A Platform (SoC) Interface * - * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2023, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -355,6 +355,9 @@ struct gk20a_platform { /* synchronized access to platform->clks */ struct nvgpu_mutex clks_lock; + + /* Check if igpu is available as pci device. */ + bool is_pci_igpu; }; static inline struct gk20a_platform *gk20a_get_platform(