diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 2786340ea..843920258 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -443,6 +443,8 @@ struct gpu_ops {
 					 struct nvgpu_gr_ctx *gr_ctx);
 		void (*fecs_host_int_enable)(struct gk20a *g);
 		int (*handle_ssync_hww)(struct gk20a *g);
+		void (*set_error_notifier)(struct gk20a *g,
+			struct gr_gk20a_isr_data *isr_data, u32 error_notifier);
 	} gr;
 	struct {
 		void (*init_hw)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 6abc7d417..b37ae8cd5 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -5113,7 +5113,7 @@ int gk20a_gr_reset(struct gk20a *g)
 	return err;
 }
 
-static void gk20a_gr_set_error_notifier(struct gk20a *g,
+void gk20a_gr_set_error_notifier(struct gk20a *g,
 		  struct gr_gk20a_isr_data *isr_data, u32 error_notifier)
 {
 	struct fifo_gk20a *f = &g->fifo;
@@ -5146,7 +5146,7 @@ static int gk20a_gr_handle_semaphore_timeout_pending(struct gk20a *g,
 		  struct gr_gk20a_isr_data *isr_data)
 {
 	gk20a_dbg_fn("");
-	gk20a_gr_set_error_notifier(g, isr_data,
+	g->ops.gr.set_error_notifier(g, isr_data,
 			 NVGPU_ERR_NOTIFIER_GR_SEMAPHORE_TIMEOUT);
 	nvgpu_err(g,
 		   "gr semaphore timeout");
@@ -5157,7 +5157,7 @@ static int gk20a_gr_intr_illegal_notify_pending(struct gk20a *g,
 		  struct gr_gk20a_isr_data *isr_data)
 {
 	gk20a_dbg_fn("");
-	gk20a_gr_set_error_notifier(g, isr_data,
+	g->ops.gr.set_error_notifier(g, isr_data,
 			 NVGPU_ERR_NOTIFIER_GR_ILLEGAL_NOTIFY);
 	/* This is an unrecoverable error, reset is needed */
 	nvgpu_err(g,
@@ -5172,7 +5172,7 @@ static int gk20a_gr_handle_illegal_method(struct gk20a *g,
 			isr_data->class_num, isr_data->offset,
 			isr_data->data_lo);
 	if (ret) {
-		gk20a_gr_set_error_notifier(g, isr_data,
+		g->ops.gr.set_error_notifier(g, isr_data,
 			 NVGPU_ERR_NOTIFIER_GR_ILLEGAL_NOTIFY);
 		nvgpu_err(g, "invalid method class 0x%08x"
 			", offset 0x%08x address 0x%08x",
@@ -5185,7 +5185,7 @@ static int gk20a_gr_handle_illegal_class(struct gk20a *g,
 					  struct gr_gk20a_isr_data *isr_data)
 {
 	gk20a_dbg_fn("");
-	gk20a_gr_set_error_notifier(g, isr_data,
+	g->ops.gr.set_error_notifier(g, isr_data,
 			 NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY);
 	nvgpu_err(g,
 		   "invalid class 0x%08x, offset 0x%08x",
@@ -5203,7 +5203,7 @@ int gk20a_gr_handle_fecs_error(struct gk20a *g, struct channel_gk20a *ch,
 		return 0;
 
 	if (gr_fecs_intr & gr_fecs_host_int_status_umimp_firmware_method_f(1)) {
-		gk20a_gr_set_error_notifier(g, isr_data,
+		g->ops.gr.set_error_notifier(g, isr_data,
 			 NVGPU_ERR_NOTIFIER_FECS_ERR_UNIMP_FIRMWARE_METHOD);
 		nvgpu_err(g,
 			  "firmware method error 0x%08x for offset 0x%04x",
@@ -5229,7 +5229,7 @@ static int gk20a_gr_handle_class_error(struct gk20a *g,
 
 	gr_class_error =
 		gr_class_error_code_v(gk20a_readl(g, gr_class_error_r()));
-	gk20a_gr_set_error_notifier(g, isr_data,
+	g->ops.gr.set_error_notifier(g, isr_data,
 			 NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY);
 	nvgpu_err(g, "class error 0x%08x, offset 0x%08x,"
 		"sub channel 0x%08x mme generated %d,"
@@ -5258,7 +5258,7 @@ static int gk20a_gr_handle_firmware_method(struct gk20a *g,
 {
 	gk20a_dbg_fn("");
 
-	gk20a_gr_set_error_notifier(g, isr_data,
+	g->ops.gr.set_error_notifier(g, isr_data,
 			 NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY);
 	nvgpu_err(g,
 		   "firmware method 0x%08x, offset 0x%08x for channel %u",
@@ -6064,7 +6064,7 @@ int gk20a_gr_isr(struct gk20a *g)
 
 		if (need_reset) {
 			nvgpu_err(g, "set gr exception notifier");
-			gk20a_gr_set_error_notifier(g, &isr_data,
+			g->ops.gr.set_error_notifier(g, &isr_data,
 					 NVGPU_ERR_NOTIFIER_GR_EXCEPTION);
 		}
 	}
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 3fcba678f..d1ba63534 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -798,5 +798,6 @@ void gk20a_gr_get_ovr_perf_regs(struct gk20a *g, u32 *num_ovr_perf_regs,
 void gk20a_gr_init_ctxsw_hdr_data(struct gk20a *g,
 					struct nvgpu_mem *mem);
 u32 gr_gk20a_get_patch_slots(struct gk20a *g);
-
+void gk20a_gr_set_error_notifier(struct gk20a *g,
+			struct gr_gk20a_isr_data *isr_data, u32 error_notifier);
 #endif /*__GR_GK20A_H__*/
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index b3efdc8ac..7425dc37a 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -311,6 +311,7 @@ static const struct gpu_ops gm20b_ops = {
 		.disable_rd_coalesce = gm20a_gr_disable_rd_coalesce,
 		.init_ctxsw_hdr_data = gk20a_gr_init_ctxsw_hdr_data,
 		.fecs_host_int_enable = gr_gk20a_fecs_host_int_enable,
+		.set_error_notifier = gk20a_gr_set_error_notifier,
 	},
 	.fb = {
 		.reset = fb_gk20a_reset,
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index 502a67786..2fa8359e3 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -373,6 +373,7 @@ static const struct gpu_ops gp106_ops = {
 		.set_ctxsw_preemption_mode = gr_gp106_set_ctxsw_preemption_mode,
 		.load_ctxsw_ucode = gr_gm20b_load_ctxsw_ucode,
 		.fecs_host_int_enable = gr_gk20a_fecs_host_int_enable,
+		.set_error_notifier = gk20a_gr_set_error_notifier,
 	},
 	.fb = {
 		.reset = gp106_fb_reset,
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 91ebab55f..38facd974 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -341,6 +341,7 @@ static const struct gpu_ops gp10b_ops = {
 				gr_gp10b_get_max_gfxp_wfi_timeout_count,
 		.dump_ctxsw_stats = gr_gp10b_dump_ctxsw_stats,
 		.fecs_host_int_enable = gr_gk20a_fecs_host_int_enable,
+		.set_error_notifier = gk20a_gr_set_error_notifier,
 	},
 	.fb = {
 		.reset = fb_gk20a_reset,
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c
index c380df8da..449c3f9c4 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c
@@ -426,6 +426,7 @@ static const struct gpu_ops gv100_ops = {
 		.decode_egpc_addr = gv11b_gr_decode_egpc_addr,
 		.fecs_host_int_enable = gr_gv11b_fecs_host_int_enable,
 		.handle_ssync_hww = gr_gv11b_handle_ssync_hww,
+		.set_error_notifier = gk20a_gr_set_error_notifier,
 	},
 	.fb = {
 		.reset = gv100_fb_reset,
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index 5282af055..7ae8898b6 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -393,6 +393,7 @@ static const struct gpu_ops gv11b_ops = {
 		.dump_ctxsw_stats = gr_gp10b_dump_ctxsw_stats,
 		.fecs_host_int_enable = gr_gv11b_fecs_host_int_enable,
 		.handle_ssync_hww = gr_gv11b_handle_ssync_hww,
+		.set_error_notifier = gk20a_gr_set_error_notifier,
 	},
 	.fb = {
 		.reset = gv11b_fb_reset,