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gpu: nvgpu: Alignment check for compressible fixed-address mappings

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Add an alignment check for compressible-kind fixed-address
mappings. If we're using page size smaller than the comptag line
coverage window, the GPU VA and the physical buffer offset must be
aligned in respect to that window.

Bug 1995897
Bug 2011640
Bug 2011668

Change-Id: If68043ee2828d54b9398d77553d10d35cc319236
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1606439
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sami Kiminki
2017-11-28 18:12:12 +02:00
committed by mobile promotions
parent 86a94230c6
commit d73ad6c07d
12 changed files with 54 additions and 0 deletions
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17
drivers/gpu/nvgpu/gk20a/gk20a.h
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@@ -446,8 +446,25 @@ struct gpu_ops {
void (*init_kind_attr)(struct gk20a *g);
void (*set_mmu_page_size)(struct gk20a *g);
bool (*set_use_full_comp_tag_line)(struct gk20a *g);
/*
* Compression tag line coverage. When mapping a compressible
* buffer, ctagline is increased when the virtual address
* crosses over the compression page boundary.
*/
unsigned int (*compression_page_size)(struct gk20a *g);
/*
* Minimum page size that can be used for compressible kinds.
*/
unsigned int (*compressible_page_size)(struct gk20a *g);
/*
* Compressible kind mappings: Mask for the virtual and physical
* address bits that must match.
*/
u32 (*compression_align_mask)(struct gk20a *g);
void (*dump_vpr_wpr_info)(struct gk20a *g);
int (*vpr_info_fetch)(struct gk20a *g);
void (*read_wpr_info)(struct gk20a *g,