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gpu: nvgpu: add DGPU config for RTV circular buffer
RTV circular context buffer is only supported on TU104 dGPU as of now. Hence compile out corresponding #define and code from safety build. Jira NVGPU-4373 Change-Id: I46a3efc92fb247fa08efb925447c248b2a4b9a57 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2255768 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
4f45ec7d5f
commit
d7971e7444
@@ -632,7 +632,6 @@ struct gops_gr_init {
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int (*load_sw_veid_bundle)(struct gk20a *g,
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struct netlist_av_list *sw_method_init);
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void (*commit_global_timeslice)(struct gk20a *g);
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u32 (*get_rtv_cb_size)(struct gk20a *g);
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u32 (*get_bundle_cb_default_size)(struct gk20a *g);
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u32 (*get_min_gpm_fifo_depth)(struct gk20a *g);
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u32 (*get_bundle_cb_token_limit)(struct gk20a *g);
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@@ -670,6 +669,7 @@ struct gops_gr_init {
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#ifdef CONFIG_NVGPU_DGPU
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int (*load_sw_bundle64)(struct gk20a *g,
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struct netlist_av64_list *sw_bundle64_init);
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u32 (*get_rtv_cb_size)(struct gk20a *g);
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void (*commit_rtv_cb)(struct gk20a *g, u64 addr,
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struct nvgpu_gr_ctx *gr_ctx, bool patch);
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#endif
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@@ -76,8 +76,10 @@ typedef void (*global_ctx_mem_destroy_fn)(struct gk20a *g,
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* accesses via firmware methods.
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*/
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#define NVGPU_GR_GLOBAL_CTX_PRIV_ACCESS_MAP 6U
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#ifdef CONFIG_NVGPU_DGPU
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/** S/W defined index for RTV circular global context buffer. */
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#define NVGPU_GR_GLOBAL_CTX_RTV_CIRCULAR_BUFFER 7U
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#endif
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#ifdef CONFIG_NVGPU_FECS_TRACE
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/** S/W defined index for global FECS trace buffer. */
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#define NVGPU_GR_GLOBAL_CTX_FECS_TRACE_BUFFER 8U
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