diff --git a/Makefile.umbrella.tmk b/Makefile.umbrella.tmk index a1c47457f..ff72fa705 100644 --- a/Makefile.umbrella.tmk +++ b/Makefile.umbrella.tmk @@ -69,6 +69,7 @@ NV_REPOSITORY_COMPONENTS += userspace/units/netlist NV_REPOSITORY_COMPONENTS += userspace/units/fifo NV_REPOSITORY_COMPONENTS += userspace/units/fifo/channel NV_REPOSITORY_COMPONENTS += userspace/units/fifo/runlist +NV_REPOSITORY_COMPONENTS += userspace/units/fifo/runlist/gk20a NV_REPOSITORY_COMPONENTS += userspace/units/fifo/runlist/gv11b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/tsg NV_REPOSITORY_COMPONENTS += userspace/units/fifo/tsg/gv11b diff --git a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export index c9e297d24..7ad760137 100644 --- a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export +++ b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export @@ -17,6 +17,10 @@ gk20a_ptimer_isr gk20a_ramin_alloc_size gk20a_ramin_base_shift gk20a_read_ptimer +gk20a_runlist_length_max +gk20a_runlist_hw_submit +gk20a_runlist_wait_pending +gk20a_runlist_write_state gk20a_vm_release_share gm20b_fb_tlb_invalidate gm20b_mm_get_big_page_sizes diff --git a/userspace/Makefile.sources b/userspace/Makefile.sources index c7ba3f43f..1d33057de 100644 --- a/userspace/Makefile.sources +++ b/userspace/Makefile.sources @@ -80,6 +80,7 @@ UNITS := \ $(UNIT_SRC)/fifo/channel/gm20b \ $(UNIT_SRC)/fifo/channel/gv11b \ $(UNIT_SRC)/fifo/runlist \ + $(UNIT_SRC)/fifo/runlist/gk20a \ $(UNIT_SRC)/fifo/runlist/gv11b \ $(UNIT_SRC)/fifo/tsg \ $(UNIT_SRC)/fifo/tsg/gv11b \ diff --git a/userspace/SWUTS.h b/userspace/SWUTS.h index 9809099c0..63337d716 100644 --- a/userspace/SWUTS.h +++ b/userspace/SWUTS.h @@ -39,6 +39,7 @@ * - @ref SWUTS-fifo * - @ref SWUTS-fifo-channel * - @ref SWUTS-fifo-runlist + * - @ref SWUTS-fifo-runlist-gk20a * - @ref SWUTS-fifo-runlist-gv11b * - @ref SWUTS-fifo-tsg * - @ref SWUTS-fifo-tsg-gv11b diff --git a/userspace/SWUTS.sources b/userspace/SWUTS.sources index 835542148..0cf35280d 100644 --- a/userspace/SWUTS.sources +++ b/userspace/SWUTS.sources @@ -12,6 +12,7 @@ INPUT += ../../../userspace/units/fifo/channel/nvgpu-channel-gk20a.h INPUT += ../../../userspace/units/fifo/channel/nvgpu-channel-gm20b.h INPUT += ../../../userspace/units/fifo/channel/nvgpu-channel-gv11b.h INPUT += ../../../userspace/units/fifo/runlist/nvgpu-runlist.h +INPUT += ../../../userspace/units/fifo/runlist/nvgpu-runlist-gk20a.h INPUT += ../../../userspace/units/fifo/runlist/nvgpu-runlist-gv11b.h INPUT += ../../../userspace/units/fifo/tsg/nvgpu-tsg.h INPUT += ../../../userspace/units/fifo/tsg/gv11b/nvgpu-tsg-gv11b.h diff --git a/userspace/units/fifo/runlist/gk20a/Makefile b/userspace/units/fifo/runlist/gk20a/Makefile new file mode 100644 index 000000000..cac15b94a --- /dev/null +++ b/userspace/units/fifo/runlist/gk20a/Makefile @@ -0,0 +1,32 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +.SUFFIXES: + +OBJS = nvgpu-runlist-gk20a.o +MODULE = nvgpu-runlist-gk20a + +LIB_PATHS += -lnvgpu-fifo +include ../../../Makefile.units + +lib$(MODULE).so: fifo + +fifo: + $(MAKE) -C ../.. diff --git a/userspace/units/fifo/runlist/gk20a/Makefile.interface.tmk b/userspace/units/fifo/runlist/gk20a/Makefile.interface.tmk new file mode 100644 index 000000000..c9ce27dd1 --- /dev/null +++ b/userspace/units/fifo/runlist/gk20a/Makefile.interface.tmk @@ -0,0 +1,35 @@ +################################### tell Emacs this is a -*- makefile-gmake -*- +# +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. +# +# tmake for SW Mobile component makefile +# +############################################################################### + +NVGPU_UNIT_NAME=nvgpu-runlist-gk20a + +include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.interface.tmk + +# Local Variables: +# indent-tabs-mode: t +# tab-width: 8 +# End: +# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/fifo/runlist/gk20a/Makefile.tmk b/userspace/units/fifo/runlist/gk20a/Makefile.tmk new file mode 100644 index 000000000..befaa540d --- /dev/null +++ b/userspace/units/fifo/runlist/gk20a/Makefile.tmk @@ -0,0 +1,40 @@ +################################### tell Emacs this is a -*- makefile-gmake -*- +# +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. +# +# tmake for SW Mobile component makefile +# +############################################################################### + +NVGPU_UNIT_NAME = nvgpu-runlist-gk20a +NVGPU_UNIT_SRCS = nvgpu-runlist-gk20a.c + +NVGPU_UNIT_INTERFACE_DIRS := \ + $(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo \ + $(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu + +include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.tmk + +# Local Variables: +# indent-tabs-mode: t +# tab-width: 8 +# End: +# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/fifo/runlist/gk20a/nvgpu-runlist-gk20a.c b/userspace/units/fifo/runlist/gk20a/nvgpu-runlist-gk20a.c new file mode 100644 index 000000000..53d36fe05 --- /dev/null +++ b/userspace/units/fifo/runlist/gk20a/nvgpu-runlist-gk20a.c @@ -0,0 +1,236 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include + +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "hal/fifo/runlist_fifo_gk20a.h" + +#include +#include + + +#include "../../nvgpu-fifo.h" +#include "nvgpu-runlist-gk20a.h" + +#ifdef RUNLIST_GK20A_UNIT_DEBUG +#undef unit_verbose +#define unit_verbose unit_info +#else +#define unit_verbose(unit, msg, ...) \ + do { \ + if (0) { \ + unit_info(unit, msg, ##__VA_ARGS__); \ + } \ + } while (0) +#endif + +#define assert(cond) unit_assert(cond, goto done) + +int test_gk20a_runlist_length_max(struct unit_module *m, + struct gk20a *g, void *args) +{ + int ret = UNIT_FAIL; + + assert(gk20a_runlist_length_max(g) == fifo_eng_runlist_length_max_v()); + ret = UNIT_SUCCESS; +done: + return ret; +} + +int test_gk20a_runlist_hw_submit(struct unit_module *m, + struct gk20a *g, void *args) +{ + int ret = UNIT_FAIL; + u32 runlist_id = nvgpu_engine_get_gr_runlist_id(g); + u32 count; + u32 buffer_index = 0; + + for (count = 0; count < 2; count++) { + + nvgpu_writel(g, fifo_runlist_r(), 0); + nvgpu_writel(g, fifo_runlist_base_r(), 0); + + gk20a_runlist_hw_submit(g, runlist_id, count, buffer_index); + if (count == 0) { + assert(nvgpu_readl(g, fifo_runlist_base_r()) == 0); + } else { + assert(nvgpu_readl(g, fifo_runlist_base_r()) != 0); + } + assert(nvgpu_readl(g, fifo_runlist_r()) == + (fifo_runlist_engine_f(runlist_id) | + fifo_eng_runlist_length_f(count))); + } + + ret = UNIT_SUCCESS; + +done: + return ret; +} + +struct unit_ctx { + struct unit_module *m; + u32 addr; + u32 count; + u32 val_when_count_is_non_zero; + u32 val_when_count_is_zero; +}; + +struct unit_ctx unit_ctx; +/* + * Write callback. Forward the write access to the mock IO framework. + */ +static void writel_access_reg_fn(struct gk20a *g, + struct nvgpu_reg_access *access) +{ + nvgpu_posix_io_writel_reg_space(g, access->addr, access->value); +} + +/* + * Read callback. Get the register value from the mock IO framework. + */ +static void readl_access_reg_fn(struct gk20a *g, + struct nvgpu_reg_access *access) +{ + if (access->addr == unit_ctx.addr) { + if (unit_ctx.count > 0) { + unit_ctx.count--; + access->value = unit_ctx.val_when_count_is_non_zero; + } else { + access->value = unit_ctx.val_when_count_is_zero; + } + unit_verbose(unit_ctx.m, "count=%u val=%x\n", + unit_ctx.count, access->value); + } else { + access->value = nvgpu_posix_io_readl_reg_space(g, access->addr); + } +} + +static struct nvgpu_posix_io_callbacks test_reg_callbacks = { + /* Write APIs all can use the same accessor. */ + .writel = writel_access_reg_fn, + .writel_check = writel_access_reg_fn, + + /* Likewise for the read APIs. */ + .__readl = readl_access_reg_fn, + .readl = readl_access_reg_fn, +}; + + +int test_gk20a_runlist_wait_pending(struct unit_module *m, + struct gk20a *g, void *args) +{ + int ret = UNIT_FAIL; + struct unit_ctx *ctx = &unit_ctx; + u32 runlist_id = nvgpu_engine_get_gr_runlist_id(g); + u32 timeout = g->poll_timeout_default; + int err; + + (void)nvgpu_posix_register_io(g, &test_reg_callbacks); + + /* nvgpu_timeout_init failure not covered yet */ + g->poll_timeout_default = 10; /* ms */ + + ctx->m = m; + ctx->addr = fifo_eng_runlist_r(runlist_id); + ctx->val_when_count_is_non_zero = fifo_eng_runlist_pending_true_f(); + ctx->val_when_count_is_zero = 0; + + /* no wait */ + ctx->count = 0; + err = gk20a_runlist_wait_pending(g, runlist_id); + assert(err == 0); + + /* 1 loop */ + ctx->count = 1; + err = gk20a_runlist_wait_pending(g, runlist_id); + assert(err == 0); + + /* 2 loops */ + ctx->count = 2; + err = gk20a_runlist_wait_pending(g, runlist_id); + assert(err == 0); + + /* timeout */ + ctx->count = U32_MAX; + err = gk20a_runlist_wait_pending(g, runlist_id); + assert(err == -ETIMEDOUT); + + ret = UNIT_SUCCESS; + +done: + g->poll_timeout_default = timeout; + return ret; +} + +int test_gk20a_runlist_write_state(struct unit_module *m, + struct gk20a *g, void *args) +{ + int ret = UNIT_FAIL; + u32 i; + u32 v; + u32 mask; + + for (i = 0; i < 2; i++) { + v = i * U32_MAX; + for (mask = 0; mask < 4; mask++) { + nvgpu_writel(g, fifo_sched_disable_r(), v); + gk20a_runlist_write_state(g, mask, RUNLIST_DISABLED); + assert(nvgpu_readl(g, fifo_sched_disable_r()) == (v | mask)); + + nvgpu_writel(g, fifo_sched_disable_r(), v); + gk20a_runlist_write_state(g, mask, RUNLIST_ENABLED); + assert(nvgpu_readl(g, fifo_sched_disable_r()) == (v & ~mask)); + } + } + + ret = UNIT_SUCCESS; + +done: + return ret; +} + +struct unit_module_test nvgpu_runlist_gk20a_tests[] = { + UNIT_TEST(init_support, test_fifo_init_support, NULL, 0), + UNIT_TEST(length_max, test_gk20a_runlist_length_max, NULL, 0), + UNIT_TEST(hw_submit, test_gk20a_runlist_hw_submit, NULL, 0), + UNIT_TEST(wait_pending, test_gk20a_runlist_wait_pending, NULL, 0), + UNIT_TEST(write_state, test_gk20a_runlist_write_state, NULL, 0), + UNIT_TEST(remove_support, test_fifo_remove_support, NULL, 0), +}; + +UNIT_MODULE(nvgpu_runlist_gk20a, nvgpu_runlist_gk20a_tests, UNIT_PRIO_NVGPU_TEST); diff --git a/userspace/units/fifo/runlist/gk20a/nvgpu-runlist-gk20a.h b/userspace/units/fifo/runlist/gk20a/nvgpu-runlist-gk20a.h new file mode 100644 index 000000000..3f7a04e60 --- /dev/null +++ b/userspace/units/fifo/runlist/gk20a/nvgpu-runlist-gk20a.h @@ -0,0 +1,124 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef UNIT_NVGPU_RUNLIST_GK20A_H +#define UNIT_NVGPU_RUNLIST_GK20A_H + +#include + +struct unit_module; +struct gk20a; + +/** @addtogroup SWUTS-fifo-runlist-gk20a + * @{ + * + * Software Unit Test Specification for fifo/runlist/gk20a + */ + +/** + * Test specification for: test_gk20a_runlist_length_max + * + * Description: Branch coverage for gk20a_runlist_length_max + * + * Test Type: Feature based + * + * Input: test_fifo_init_support() run for this GPU + * + * Steps: + * - Check that max length matches definition in H/W manuals. + * + * Output: Returns PASS if all branches gave expected results. FAIL otherwise. + */ +int test_gk20a_runlist_length_max(struct unit_module *m, + struct gk20a *g, void *args); + +/** + * Test specification for: test_gk20a_runlist_hw_submit + * + * Description: Branch coverage for gk20a_runlist_hw_submit + * + * Test Type: Feature based + * + * Input: test_fifo_init_support() run for this GPU + * + * Steps: + * - Check that fifo_runlist_base_r is not programmed when count is 0. + * - Check that fifo_runlist_base_r is programmed with count > 0. + * - Check that runlist_r register is programmed with runlist_id and count. + * + * Output: Returns PASS if all branches gave expected results. FAIL otherwise. + */ +int test_gk20a_runlist_hw_submit(struct unit_module *m, + struct gk20a *g, void *args); + +/** + * Test specification for: test_gk20a_runlist_wait_pending + * + * Description: Branch coverage for gk20a_runlist_wait_pending + * + * Test Type: Feature based + * + * Input: test_fifo_init_support() run for this GPU + * + * Steps: + * - Check case where runlist is not pending (not wait). + * - Set register to indicate that runlist is NOT pending. + * - call gk20a_runlist_wait_pending. + * - Check case where some polling is needed until runlist is not pending: + * - Set register to indicate that runlist is pending. + * - Start a thread to clear this bit after some time. + * Time is chosed so that one ore more loops are required. + * - call gk20a_runlist_wait_pending. + * - Check case where polling times out: + * - Set register to indicate that runlist is pending. + * - call gk20a_runlist_wait_pending. + * + * Output: Returns PASS if all branches gave expected results. FAIL otherwise. + */ +int test_gk20a_runlist_wait_pending(struct unit_module *m, + struct gk20a *g, void *args); + +/** + * Test specification for: test_gk20a_runlist_write_state + * + * Description: Branch coverage for gk20a_runlist_write_state + * + * Test Type: Feature based + * + * Input: test_fifo_init_support() run for this GPU + * + * Steps: + * - Use nested loops to test combinations of: + * - Initial value fifo_sched_disable_r() is either 0 or U32_MAX. + * - runlists_mask varies from 0 to 3. + * - runlist_state is either RUNLIST_DISABLED or RUNLIST_ENABLED. + * - Check that corresponding bits are set/cleared in fifo_sched_disabled_r. + * + * Output: Returns PASS if all branches gave expected results. FAIL otherwise. + */ +int test_gk20a_runlist_write_state(struct unit_module *m, + struct gk20a *g, void *args); + +/** + * @} + */ + +#endif /* UNIT_NVGPU_RUNLIST_GK20A_H */