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gpu: nvgpu: Move sched to be Linux specific

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Move sched parameter APIs to be Linux specific implementation. At
the same time the sched_ctrl fields were moved to nvgpu_os_linux.

JIRA NVGPU-259

Change-Id: I2397e2602e1c4783f2bebf3aec462634b7f86d4a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1580649
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Terje Bergstrom
2017-10-17 10:44:51 -07:00
committed by mobile promotions
parent a2c9c6ba05
commit d7fe2fbacb
11 changed files with 112 additions and 110 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/Makefile.nvgpu
View File

@@ -53,6 +53,7 @@ nvgpu-y := \
common/linux/cde_gp10b.o \ common/linux/cde_gp10b.o \
common/linux/comptags.o \ common/linux/comptags.o \
common/linux/dmabuf.o \ common/linux/dmabuf.o \
common/linux/sched.o \
common/mm/nvgpu_allocator.o \ common/mm/nvgpu_allocator.o \
common/mm/bitmap_allocator.o \ common/mm/bitmap_allocator.o \
common/mm/buddy_allocator.o \ common/mm/buddy_allocator.o \
@@ -82,7 +83,6 @@ nvgpu-y := \
gk20a/gk20a.o \ gk20a/gk20a.o \
gk20a/bus_gk20a.o \ gk20a/bus_gk20a.o \
gk20a/pramin_gk20a.o \ gk20a/pramin_gk20a.o \
gk20a/sched_gk20a.o \
gk20a/ce2_gk20a.o \ gk20a/ce2_gk20a.o \
gk20a/fifo_gk20a.o \ gk20a/fifo_gk20a.o \
gk20a/channel_gk20a.o \ gk20a/channel_gk20a.o \

3
drivers/gpu/nvgpu/common/linux/debug_sched.c
View File

@@ -21,7 +21,8 @@
static int gk20a_sched_debugfs_show(struct seq_file *s, void *unused) static int gk20a_sched_debugfs_show(struct seq_file *s, void *unused)
{ {
struct gk20a *g = s->private; struct gk20a *g = s->private;
struct gk20a_sched_ctrl *sched = &g->sched_ctrl; struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
struct gk20a_sched_ctrl *sched = &l->sched_ctrl;
bool sched_busy = true; bool sched_busy = true;
int n = sched->bitmap_size / sizeof(u64); int n = sched->bitmap_size / sizeof(u64);

23
drivers/gpu/nvgpu/common/linux/ioctl_tsg.c
View File

@@ -237,6 +237,8 @@ int nvgpu_ioctl_tsg_open(struct gk20a *g, struct file *filp)
priv->tsg = tsg; priv->tsg = tsg;
filp->private_data = priv; filp->private_data = priv;
gk20a_sched_ctrl_tsg_added(g, tsg);
return 0; return 0;
free_ref: free_ref:
@@ -257,12 +259,22 @@ int nvgpu_ioctl_tsg_dev_open(struct inode *inode, struct file *filp)
return ret; return ret;
} }
void nvgpu_ioctl_tsg_release(struct nvgpu_ref *ref)
{
struct tsg_gk20a *tsg = container_of(ref, struct tsg_gk20a, refcount);
struct gk20a *g = tsg->g;
gk20a_sched_ctrl_tsg_removed(g, tsg);
gk20a_tsg_release(ref);
}
int nvgpu_ioctl_tsg_dev_release(struct inode *inode, struct file *filp) int nvgpu_ioctl_tsg_dev_release(struct inode *inode, struct file *filp)
{ {
struct tsg_private *priv = filp->private_data; struct tsg_private *priv = filp->private_data;
struct tsg_gk20a *tsg = priv->tsg; struct tsg_gk20a *tsg = priv->tsg;
nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release); nvgpu_ref_put(&tsg->refcount, nvgpu_ioctl_tsg_release);
nvgpu_kfree(tsg->g, priv); nvgpu_kfree(tsg->g, priv);
return 0; return 0;
} }
@@ -270,7 +282,8 @@ int nvgpu_ioctl_tsg_dev_release(struct inode *inode, struct file *filp)
static int gk20a_tsg_ioctl_set_priority(struct gk20a *g, static int gk20a_tsg_ioctl_set_priority(struct gk20a *g,
struct tsg_gk20a *tsg, struct nvgpu_set_priority_args *arg) struct tsg_gk20a *tsg, struct nvgpu_set_priority_args *arg)
{ {
struct gk20a_sched_ctrl *sched = &g->sched_ctrl; struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
struct gk20a_sched_ctrl *sched = &l->sched_ctrl;
int err; int err;
nvgpu_mutex_acquire(&sched->control_lock); nvgpu_mutex_acquire(&sched->control_lock);
@@ -296,7 +309,8 @@ done:
static int gk20a_tsg_ioctl_set_runlist_interleave(struct gk20a *g, static int gk20a_tsg_ioctl_set_runlist_interleave(struct gk20a *g,
struct tsg_gk20a *tsg, struct nvgpu_runlist_interleave_args *arg) struct tsg_gk20a *tsg, struct nvgpu_runlist_interleave_args *arg)
{ {
struct gk20a_sched_ctrl *sched = &g->sched_ctrl; struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
struct gk20a_sched_ctrl *sched = &l->sched_ctrl;
int err; int err;
gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid); gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid);
@@ -323,7 +337,8 @@ done:
static int gk20a_tsg_ioctl_set_timeslice(struct gk20a *g, static int gk20a_tsg_ioctl_set_timeslice(struct gk20a *g,
struct tsg_gk20a *tsg, struct nvgpu_timeslice_args *arg) struct tsg_gk20a *tsg, struct nvgpu_timeslice_args *arg)
{ {
struct gk20a_sched_ctrl *sched = &g->sched_ctrl; struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
struct gk20a_sched_ctrl *sched = &l->sched_ctrl;
int err; int err;
gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid); gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid);

2
drivers/gpu/nvgpu/common/linux/ioctl_tsg.h
View File

@@ -16,11 +16,13 @@
struct inode; struct inode;
struct file; struct file;
struct gk20a; struct gk20a;
struct nvgpu_ref;
int nvgpu_ioctl_tsg_dev_release(struct inode *inode, struct file *filp); int nvgpu_ioctl_tsg_dev_release(struct inode *inode, struct file *filp);
int nvgpu_ioctl_tsg_dev_open(struct inode *inode, struct file *filp); int nvgpu_ioctl_tsg_dev_open(struct inode *inode, struct file *filp);
int nvgpu_ioctl_tsg_open(struct gk20a *g, struct file *filp); int nvgpu_ioctl_tsg_open(struct gk20a *g, struct file *filp);
long nvgpu_ioctl_tsg_dev_ioctl(struct file *filp, long nvgpu_ioctl_tsg_dev_ioctl(struct file *filp,
unsigned int cmd, unsigned long arg); unsigned int cmd, unsigned long arg);
void nvgpu_ioctl_tsg_release(struct nvgpu_ref *ref);
#endif #endif

3
drivers/gpu/nvgpu/common/linux/os_linux.h
View File

@@ -23,6 +23,7 @@
#endif #endif
#include "gk20a/gk20a.h" #include "gk20a/gk20a.h"
#include "cde.h" #include "cde.h"
#include "sched.h"
struct nvgpu_os_linux_ops { struct nvgpu_os_linux_ops {
struct { struct {
@@ -144,6 +145,8 @@ struct nvgpu_os_linux {
struct gk20a_cde_app cde_app; struct gk20a_cde_app cde_app;
struct rw_semaphore busy_lock; struct rw_semaphore busy_lock;
struct gk20a_sched_ctrl sched_ctrl;
}; };
static inline struct nvgpu_os_linux *nvgpu_os_linux_from_gk20a(struct gk20a *g) static inline struct nvgpu_os_linux *nvgpu_os_linux_from_gk20a(struct gk20a *g)

63
drivers/gpu/nvgpu/gk20a/sched_gk20a.c → drivers/gpu/nvgpu/common/linux/sched.c
View File

@@ -1,25 +1,18 @@
/* /*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * This program is free software; you can redistribute it and/or modify it
* copy of this software and associated documentation files (the "Software"), * under the terms and conditions of the GNU General Public License,
* to deal in the Software without restriction, including without limitation * version 2, as published by the Free Software Foundation.
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
* *
* The above copyright notice and this permission notice shall be included in * This program is distributed in the hope it will be useful, but WITHOUT
* all copies or substantial portions of the Software. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * You should have received a copy of the GNU General Public License
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * along with this program. If not, see <http://www.gnu.org/licenses/>.
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/ */
#include <asm/barrier.h> #include <asm/barrier.h>
#include <linux/wait.h> #include <linux/wait.h>
#include <linux/uaccess.h> #include <linux/uaccess.h>
@@ -30,11 +23,11 @@
#include <nvgpu/log.h> #include <nvgpu/log.h>
#include <nvgpu/bug.h> #include <nvgpu/bug.h>
#include "ctxsw_trace_gk20a.h" #include "gk20a/gk20a.h"
#include "gk20a.h" #include "gk20a/gr_gk20a.h"
#include "gr_gk20a.h" #include "sched.h"
#include "sched_gk20a.h" #include "os_linux.h"
#include "common/linux/os_linux.h" #include "ioctl_tsg.h"
#include <nvgpu/hw/gk20a/hw_ctxsw_prog_gk20a.h> #include <nvgpu/hw/gk20a/hw_ctxsw_prog_gk20a.h>
#include <nvgpu/hw/gk20a/hw_gr_gk20a.h> #include <nvgpu/hw/gk20a/hw_gr_gk20a.h>
@@ -215,7 +208,7 @@ static int gk20a_sched_dev_ioctl_get_params(struct gk20a_sched_ctrl *sched,
arg->compute_preempt_mode = 0; arg->compute_preempt_mode = 0;
} }
nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release); nvgpu_ref_put(&tsg->refcount, nvgpu_ioctl_tsg_release);
return 0; return 0;
} }
@@ -248,7 +241,7 @@ static int gk20a_sched_dev_ioctl_tsg_set_timeslice(
gk20a_idle(g); gk20a_idle(g);
done: done:
nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release); nvgpu_ref_put(&tsg->refcount, nvgpu_ioctl_tsg_release);
return err; return err;
} }
@@ -281,7 +274,7 @@ static int gk20a_sched_dev_ioctl_tsg_set_runlist_interleave(
gk20a_idle(g); gk20a_idle(g);
done: done:
nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release); nvgpu_ref_put(&tsg->refcount, nvgpu_ioctl_tsg_release);
return err; return err;
} }
@@ -335,9 +328,9 @@ static int gk20a_sched_dev_ioctl_get_tsg(struct gk20a_sched_ctrl *sched,
nvgpu_mutex_acquire(&sched->status_lock); nvgpu_mutex_acquire(&sched->status_lock);
if (NVGPU_SCHED_ISSET(tsgid, sched->ref_tsg_bitmap)) { if (NVGPU_SCHED_ISSET(tsgid, sched->ref_tsg_bitmap)) {
nvgpu_warn(g, "tsgid=%d already referenced", tsgid); nvgpu_warn(g, "tsgid=%d already referenced", tsgid);
/* unlock status_lock as gk20a_tsg_release locks it */ /* unlock status_lock as nvgpu_ioctl_tsg_release locks it */
nvgpu_mutex_release(&sched->status_lock); nvgpu_mutex_release(&sched->status_lock);
nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release); nvgpu_ref_put(&tsg->refcount, nvgpu_ioctl_tsg_release);
return -ENXIO; return -ENXIO;
} }
@@ -373,7 +366,7 @@ static int gk20a_sched_dev_ioctl_put_tsg(struct gk20a_sched_ctrl *sched,
nvgpu_mutex_release(&sched->status_lock); nvgpu_mutex_release(&sched->status_lock);
tsg = &f->tsg[tsgid]; tsg = &f->tsg[tsgid];
nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release); nvgpu_ref_put(&tsg->refcount, nvgpu_ioctl_tsg_release);
return 0; return 0;
} }
@@ -389,7 +382,7 @@ int gk20a_sched_dev_open(struct inode *inode, struct file *filp)
g = gk20a_get(&l->g); g = gk20a_get(&l->g);
if (!g) if (!g)
return -ENODEV; return -ENODEV;
sched = &g->sched_ctrl; sched = &l->sched_ctrl;
gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "g=%p", g); gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "g=%p", g);
@@ -516,7 +509,7 @@ int gk20a_sched_dev_release(struct inode *inode, struct file *filp)
for (tsgid = 0; tsgid < f->num_channels; tsgid++) { for (tsgid = 0; tsgid < f->num_channels; tsgid++) {
if (NVGPU_SCHED_ISSET(tsgid, sched->ref_tsg_bitmap)) { if (NVGPU_SCHED_ISSET(tsgid, sched->ref_tsg_bitmap)) {
tsg = &f->tsg[tsgid]; tsg = &f->tsg[tsgid];
nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release); nvgpu_ref_put(&tsg->refcount, nvgpu_ioctl_tsg_release);
} }
} }
@@ -532,7 +525,8 @@ int gk20a_sched_dev_release(struct inode *inode, struct file *filp)
void gk20a_sched_ctrl_tsg_added(struct gk20a *g, struct tsg_gk20a *tsg) void gk20a_sched_ctrl_tsg_added(struct gk20a *g, struct tsg_gk20a *tsg)
{ {
struct gk20a_sched_ctrl *sched = &g->sched_ctrl; struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
struct gk20a_sched_ctrl *sched = &l->sched_ctrl;
int err; int err;
gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid); gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid);
@@ -557,7 +551,8 @@ void gk20a_sched_ctrl_tsg_added(struct gk20a *g, struct tsg_gk20a *tsg)
void gk20a_sched_ctrl_tsg_removed(struct gk20a *g, struct tsg_gk20a *tsg) void gk20a_sched_ctrl_tsg_removed(struct gk20a *g, struct tsg_gk20a *tsg)
{ {
struct gk20a_sched_ctrl *sched = &g->sched_ctrl; struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
struct gk20a_sched_ctrl *sched = &l->sched_ctrl;
gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid); gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid);
@@ -579,7 +574,8 @@ void gk20a_sched_ctrl_tsg_removed(struct gk20a *g, struct tsg_gk20a *tsg)
int gk20a_sched_ctrl_init(struct gk20a *g) int gk20a_sched_ctrl_init(struct gk20a *g)
{ {
struct gk20a_sched_ctrl *sched = &g->sched_ctrl; struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
struct gk20a_sched_ctrl *sched = &l->sched_ctrl;
struct fifo_gk20a *f = &g->fifo; struct fifo_gk20a *f = &g->fifo;
int err; int err;
@@ -643,7 +639,8 @@ free_active:
void gk20a_sched_ctrl_cleanup(struct gk20a *g) void gk20a_sched_ctrl_cleanup(struct gk20a *g)
{ {
struct gk20a_sched_ctrl *sched = &g->sched_ctrl; struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
struct gk20a_sched_ctrl *sched = &l->sched_ctrl;
nvgpu_kfree(g, sched->active_tsg_bitmap); nvgpu_kfree(g, sched->active_tsg_bitmap);
nvgpu_kfree(g, sched->recent_tsg_bitmap); nvgpu_kfree(g, sched->recent_tsg_bitmap);

55
drivers/gpu/nvgpu/common/linux/sched.h Normal file
View File

@@ -0,0 +1,55 @@
/*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __NVGPU_SCHED_H
#define __NVGPU_SCHED_H
struct gk20a;
struct gpu_ops;
struct tsg_gk20a;
struct poll_table_struct;
struct gk20a_sched_ctrl {
struct gk20a *g;
struct nvgpu_mutex control_lock;
bool control_locked;
bool sw_ready;
struct nvgpu_mutex status_lock;
struct nvgpu_mutex busy_lock;
u64 status;
size_t bitmap_size;
u64 *active_tsg_bitmap;
u64 *recent_tsg_bitmap;
u64 *ref_tsg_bitmap;
struct nvgpu_cond readout_wq;
};
int gk20a_sched_dev_release(struct inode *inode, struct file *filp);
int gk20a_sched_dev_open(struct inode *inode, struct file *filp);
long gk20a_sched_dev_ioctl(struct file *, unsigned int, unsigned long);
ssize_t gk20a_sched_dev_read(struct file *, char __user *, size_t, loff_t *);
unsigned int gk20a_sched_dev_poll(struct file *, struct poll_table_struct *);
void gk20a_sched_ctrl_tsg_added(struct gk20a *, struct tsg_gk20a *);
void gk20a_sched_ctrl_tsg_removed(struct gk20a *, struct tsg_gk20a *);
int gk20a_sched_ctrl_init(struct gk20a *);
void gk20a_sched_ctrl_cleanup(struct gk20a *g);
#endif /* __NVGPU_SCHED_H */

3
drivers/gpu/nvgpu/gk20a/gk20a.h
View File

@@ -67,7 +67,6 @@ struct nvgpu_warpstate;
#include "pmu_gk20a.h" #include "pmu_gk20a.h"
#include "priv_ring_gk20a.h" #include "priv_ring_gk20a.h"
#include "therm_gk20a.h" #include "therm_gk20a.h"
#include "sched_gk20a.h"
#ifdef CONFIG_ARCH_TEGRA_18x_SOC #ifdef CONFIG_ARCH_TEGRA_18x_SOC
#include "clk/clk.h" #include "clk/clk.h"
#include "clk/clk_arb.h" #include "clk/clk_arb.h"
@@ -1220,8 +1219,6 @@ struct gk20a {
struct gk20a_ctxsw_trace *ctxsw_trace; struct gk20a_ctxsw_trace *ctxsw_trace;
struct gk20a_fecs_trace *fecs_trace; struct gk20a_fecs_trace *fecs_trace;
struct gk20a_sched_ctrl sched_ctrl;
bool mmu_debug_ctrl; bool mmu_debug_ctrl;
u32 tpc_fs_mask_user; u32 tpc_fs_mask_user;

2
drivers/gpu/nvgpu/gk20a/regops_gk20a.h
View File

@@ -24,8 +24,6 @@
#ifndef REGOPS_GK20A_H #ifndef REGOPS_GK20A_H
#define REGOPS_GK20A_H #define REGOPS_GK20A_H
#include <uapi/linux/nvgpu.h>
struct regop_offset_range { struct regop_offset_range {
u32 base:24; u32 base:24;
u32 count:8; u32 count:8;

62
drivers/gpu/nvgpu/gk20a/sched_gk20a.h
View File

@@ -1,62 +0,0 @@
/*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef __SCHED_GK20A_H
#define __SCHED_GK20A_H
struct gk20a;
struct gpu_ops;
struct tsg_gk20a;
struct poll_table_struct;
struct gk20a_sched_ctrl {
struct gk20a *g;
struct nvgpu_mutex control_lock;
bool control_locked;
bool sw_ready;
struct nvgpu_mutex status_lock;
struct nvgpu_mutex busy_lock;
u64 status;
size_t bitmap_size;
u64 *active_tsg_bitmap;
u64 *recent_tsg_bitmap;
u64 *ref_tsg_bitmap;
struct nvgpu_cond readout_wq;
};
int gk20a_sched_dev_release(struct inode *inode, struct file *filp);
int gk20a_sched_dev_open(struct inode *inode, struct file *filp);
long gk20a_sched_dev_ioctl(struct file *, unsigned int, unsigned long);
ssize_t gk20a_sched_dev_read(struct file *, char __user *, size_t, loff_t *);
unsigned int gk20a_sched_dev_poll(struct file *, struct poll_table_struct *);
void gk20a_sched_ctrl_tsg_added(struct gk20a *, struct tsg_gk20a *);
void gk20a_sched_ctrl_tsg_removed(struct gk20a *, struct tsg_gk20a *);
int gk20a_sched_ctrl_init(struct gk20a *);
void gk20a_sched_ctrl_cleanup(struct gk20a *g);
#endif /* __SCHED_GK20A_H */

4
drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
View File

@@ -325,8 +325,6 @@ struct tsg_gk20a *gk20a_tsg_open(struct gk20a *g)
gk20a_dbg(gpu_dbg_fn, "tsg opened %d\n", tsg->tsgid); gk20a_dbg(gpu_dbg_fn, "tsg opened %d\n", tsg->tsgid);
gk20a_sched_ctrl_tsg_added(g, tsg);
return tsg; return tsg;
clean_up: clean_up:
@@ -353,8 +351,6 @@ void gk20a_tsg_release(struct nvgpu_ref *ref)
tsg->vm = NULL; tsg->vm = NULL;
} }
gk20a_sched_ctrl_tsg_removed(g, tsg);
/* unhook all events created on this TSG */ /* unhook all events created on this TSG */
nvgpu_mutex_acquire(&tsg->event_id_list_lock); nvgpu_mutex_acquire(&tsg->event_id_list_lock);
nvgpu_list_for_each_entry_safe(event_id_data, event_id_data_temp, nvgpu_list_for_each_entry_safe(event_id_data, event_id_data_temp,