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gpu: nvgpu: prepare class unit for safety build

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Move graphics related defs and functions under CONFIG_NVGPU_GRAPHICS
switch.
Move classes not supported in GV11B under CONFIG_NVGPU_NON_FUSA
switch.
Add missing valid class numbers to gpu_class.is_valid HAL.
Also remove un-used class defs from class.h header.

Lot of qnx safety tests are still using graphics 3d class.
Until those tests got fixed, allowing 3d graphics class
as valid class for safety build.

JIRA NVGPU-4301

Change-Id: Ifd2a13bee3210821799c2bca10e7245eb3c79121
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2224658
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seshendra Gadagottu
2019-10-23 18:12:21 -07:00
committed by Alex Waterman
parent 6d0ef6473d
commit d8058743d7
20 changed files with 110 additions and 47 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/nvgpu/hal/init/hal_gm20b.c
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@@ -556,8 +556,10 @@ static const struct gpu_ops gm20b_ops = {
},
.gpu_class = {
.is_valid = gm20b_class_is_valid,
.is_valid_gfx = gm20b_class_is_valid_gfx,
.is_valid_compute = gm20b_class_is_valid_compute,
#ifdef CONFIG_NVGPU_GRAPHICS
.is_valid_gfx = gm20b_class_is_valid_gfx,
#endif
},
.fb = {
.init_hw = gm20b_fb_init_hw,

4
drivers/gpu/nvgpu/hal/init/hal_gm20b_litter.c
View File

@@ -111,15 +111,19 @@ u32 gm20b_get_litter_value(struct gk20a *g, int value)
case GPU_LIT_FBPA_SHARED_BASE:
ret = 0;
break;
#ifdef CONFIG_NVGPU_GRAPHICS
case GPU_LIT_TWOD_CLASS:
ret = FERMI_TWOD_A;
break;
case GPU_LIT_THREED_CLASS:
ret = MAXWELL_B;
break;
#endif
#ifdef CONFIG_NVGPU_NON_FUSA
case GPU_LIT_COMPUTE_CLASS:
ret = MAXWELL_COMPUTE_B;
break;
#endif
case GPU_LIT_GPFIFO_CLASS:
ret = MAXWELL_CHANNEL_GPFIFO_A;
break;

4
drivers/gpu/nvgpu/hal/init/hal_gp10b_litter.c
View File

@@ -111,15 +111,19 @@ u32 gp10b_get_litter_value(struct gk20a *g, int value)
case GPU_LIT_FBPA_SHARED_BASE:
ret = 0;
break;
#ifdef CONFIG_NVGPU_GRAPHICS
case GPU_LIT_TWOD_CLASS:
ret = FERMI_TWOD_A;
break;
case GPU_LIT_THREED_CLASS:
ret = PASCAL_A;
break;
#endif
#ifdef CONFIG_NVGPU_NON_FUSA
case GPU_LIT_COMPUTE_CLASS:
ret = PASCAL_COMPUTE_A;
break;
#endif
case GPU_LIT_GPFIFO_CLASS:
ret = PASCAL_CHANNEL_GPFIFO_A;
break;

4
drivers/gpu/nvgpu/hal/init/hal_gv11b.c
View File

@@ -766,8 +766,10 @@ static const struct gpu_ops gv11b_ops = {
},
.gpu_class = {
.is_valid = gv11b_class_is_valid,
.is_valid_gfx = gv11b_class_is_valid_gfx,
.is_valid_compute = gv11b_class_is_valid_compute,
#ifdef CONFIG_NVGPU_GRAPHICS
.is_valid_gfx = gv11b_class_is_valid_gfx,
#endif
},
.fb = {
#ifdef CONFIG_NVGPU_INJECT_HWERR

2
drivers/gpu/nvgpu/hal/init/hal_gv11b_litter.c
View File

@@ -126,12 +126,14 @@ u32 gv11b_get_litter_value(struct gk20a *g, int value)
case GPU_LIT_FBPA_SHARED_BASE:
ret = 0;
break;
#ifdef CONFIG_NVGPU_GRAPHICS
case GPU_LIT_TWOD_CLASS:
ret = FERMI_TWOD_A;
break;
case GPU_LIT_THREED_CLASS:
ret = VOLTA_A;
break;
#endif
case GPU_LIT_COMPUTE_CLASS:
ret = VOLTA_COMPUTE_A;
break;

4
drivers/gpu/nvgpu/hal/init/hal_tu104.c
View File

@@ -786,8 +786,10 @@ static const struct gpu_ops tu104_ops = {
},
.gpu_class = {
.is_valid = tu104_class_is_valid,
.is_valid_gfx = tu104_class_is_valid_gfx,
.is_valid_compute = tu104_class_is_valid_compute,
#ifdef CONFIG_NVGPU_GRAPHICS
.is_valid_gfx = tu104_class_is_valid_gfx,
#endif
},
.fb = {
.init_hw = gv11b_fb_init_hw,

6
drivers/gpu/nvgpu/hal/init/hal_tu104_litter.c
View File

@@ -125,24 +125,30 @@ u32 tu104_get_litter_value(struct gk20a *g, int value)
case GPU_LIT_SMPC_PRI_STRIDE:
ret = proj_smpc_stride_v();
break;
#ifdef CONFIG_NVGPU_GRAPHICS
case GPU_LIT_TWOD_CLASS:
ret = FERMI_TWOD_A;
break;
case GPU_LIT_THREED_CLASS:
ret = TURING_A;
break;
#endif
#ifdef CONFIG_NVGPU_NON_FUSA
case GPU_LIT_COMPUTE_CLASS:
ret = TURING_COMPUTE_A;
break;
case GPU_LIT_GPFIFO_CLASS:
ret = TURING_CHANNEL_GPFIFO_A;
break;
#endif
case GPU_LIT_I2M_CLASS:
ret = KEPLER_INLINE_TO_MEMORY_B;
break;
#ifdef CONFIG_NVGPU_NON_FUSA
case GPU_LIT_DMA_COPY_CLASS:
ret = TURING_DMA_COPY_A;
break;
#endif
case GPU_LIT_GPC_PRIV_STRIDE:
ret = proj_gpc_priv_stride_v();
break;