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gpu: nvgpu: common: MISRA rule 15.6 fixes

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MISRA rule 15.6 requires that all if/else/loop blocks should be enclosed
by brackets. This patch adds brackets to single line if/else/loop blocks
in the common directory.

JIRA NVGPU-775

Change-Id: I0dfb38dbf256d49bc0391d889d9fbe5e21da5641
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011655
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Scott Long <scottl@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Adeel Raza
2019-02-04 13:45:38 -08:00
committed by mobile promotions
parent 254253732c
commit d828e013db
10 changed files with 180 additions and 94 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/gpu/nvgpu/common/sim.c
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@@ -39,8 +39,9 @@ int nvgpu_alloc_sim_buffer(struct gk20a *g, struct nvgpu_mem *mem)
void nvgpu_free_sim_buffer(struct gk20a *g, struct nvgpu_mem *mem)
{
if (nvgpu_mem_is_valid(mem))
if (nvgpu_mem_is_valid(mem)) {
nvgpu_dma_free(g, mem);
}
(void) memset(mem, 0, sizeof(*mem));
}
@@ -54,8 +55,9 @@ void nvgpu_free_sim_support(struct gk20a *g)
void nvgpu_remove_sim_support(struct gk20a *g)
{
if (g->sim)
if (g->sim) {
nvgpu_free_sim_support(g);
}
}
static inline u32 sim_msg_header_size(void)
@@ -246,8 +248,9 @@ static void nvgpu_sim_init_late(struct gk20a *g)
{
u64 phys;
if (!g->sim)
if (!g->sim) {
return;
}
nvgpu_info(g, "sim init late");
/*mark send ring invalid*/
@@ -291,16 +294,18 @@ int nvgpu_init_sim_support(struct gk20a *g)
{
int err = -ENOMEM;
if (!g->sim)
if (!g->sim) {
return 0;
}
/* allocate sim event/msg buffers */
err = nvgpu_alloc_sim_buffer(g, &g->sim->send_bfr);
err = err || nvgpu_alloc_sim_buffer(g, &g->sim->recv_bfr);
err = err || nvgpu_alloc_sim_buffer(g, &g->sim->msg_bfr);
if (err != 0)
if (err != 0) {
goto fail;
}
g->sim->sim_init_late = nvgpu_sim_init_late;
g->sim->remove_support = nvgpu_remove_sim_support;