From d8c5ce3c858758ea824253830eb99726509af6f5 Mon Sep 17 00:00:00 2001 From: Aparna Das Date: Mon, 4 Feb 2019 15:24:58 -0800 Subject: [PATCH] gpu: nvgpu: vgpu: move vgpu fifo files under vgpu/fifo Create a new directory fifo under common vgpu path moving all vgp common fifo files under that directory. Move vgpu runlist implementations to a new file runlist_vgpu.c and create corresponding header file. Also fix lines over 80 chars in fifo_vgpu.c Jira GVSCI-334 Change-Id: Ic00535b22a6066a0d27435b9a987de7fa701ea05 Signed-off-by: Aparna Das Reviewed-on: https://git-master.nvidia.com/r/2011762 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/Makefile | 5 +- drivers/gpu/nvgpu/Makefile.sources | 5 +- .../nvgpu/common/vgpu/{ => fifo}/fifo_vgpu.c | 193 +-------------- .../nvgpu/common/vgpu/{ => fifo}/fifo_vgpu.h | 9 - .../gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.c | 220 ++++++++++++++++++ .../gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.h | 36 +++ .../vgpu/{gv11b => fifo}/vgpu_fifo_gv11b.c | 2 +- .../vgpu/{gv11b => fifo}/vgpu_fifo_gv11b.h | 0 .../nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c | 3 +- .../nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c | 6 +- drivers/gpu/nvgpu/common/vgpu/tsg_vgpu.c | 2 +- 11 files changed, 274 insertions(+), 207 deletions(-) rename drivers/gpu/nvgpu/common/vgpu/{ => fifo}/fifo_vgpu.c (75%) rename drivers/gpu/nvgpu/common/vgpu/{ => fifo}/fifo_vgpu.h (88%) create mode 100644 drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.c create mode 100644 drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.h rename drivers/gpu/nvgpu/common/vgpu/{gv11b => fifo}/vgpu_fifo_gv11b.c (99%) rename drivers/gpu/nvgpu/common/vgpu/{gv11b => fifo}/vgpu_fifo_gv11b.h (100%) diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index ae13d14a8..10cb9ccb1 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -385,7 +385,9 @@ nvgpu-$(CONFIG_GK20A_VIDMEM) += \ nvgpu-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += \ common/vgpu/ltc_vgpu.o \ common/vgpu/gr_vgpu.o \ - common/vgpu/fifo_vgpu.o \ + common/vgpu/fifo/fifo_vgpu.o \ + common/vgpu/fifo/runlist_vgpu.o \ + common/vgpu/fifo/vgpu_fifo_gv11b.o \ common/vgpu/ce_vgpu.o \ common/vgpu/mm_vgpu.o \ common/vgpu/vgpu.o \ @@ -404,7 +406,6 @@ nvgpu-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += \ common/vgpu/gv11b/vgpu_gv11b.o \ common/vgpu/gv11b/vgpu_hal_gv11b.o \ common/vgpu/gv11b/vgpu_gr_gv11b.o \ - common/vgpu/gv11b/vgpu_fifo_gv11b.o \ common/vgpu/gv11b/vgpu_subctx_gv11b.o \ common/vgpu/gv11b/vgpu_tsg_gv11b.o \ diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index 5cd94af9a..45f6d707e 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources @@ -308,7 +308,9 @@ srcs += common/sim.c \ tu104/func_tu104.c \ tu104/fecs_trace_tu104.c \ common/vgpu/vgpu.c \ - common/vgpu/fifo_vgpu.c \ + common/vgpu/fifo/fifo_vgpu.c \ + common/vgpu/fifo/runlist_vgpu.c \ + common/vgpu/fifo/vgpu_fifo_gv11b.c \ common/vgpu/tsg_vgpu.c \ common/vgpu/perf/cyclestats_snapshot_vgpu.c \ common/vgpu/perf/perf_vgpu.c \ @@ -321,7 +323,6 @@ srcs += common/sim.c \ common/vgpu/ce_vgpu.c \ common/vgpu/gv11b/vgpu_gv11b.c \ common/vgpu/gv11b/vgpu_hal_gv11b.c \ - common/vgpu/gv11b/vgpu_fifo_gv11b.c \ common/vgpu/gv11b/vgpu_tsg_gv11b.c \ common/vgpu/gv11b/vgpu_subctx_gv11b.c \ common/vgpu/gv11b/vgpu_gr_gv11b.c \ diff --git a/drivers/gpu/nvgpu/common/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/common/vgpu/fifo/fifo_vgpu.c similarity index 75% rename from drivers/gpu/nvgpu/common/vgpu/fifo_vgpu.c rename to drivers/gpu/nvgpu/common/vgpu/fifo/fifo_vgpu.c index 5835548fc..9f1f738c1 100644 --- a/drivers/gpu/nvgpu/common/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/common/vgpu/fifo/fifo_vgpu.c @@ -198,7 +198,7 @@ int vgpu_fifo_init_engine_info(struct fifo_gk20a *f) f->num_engines = engines->num_engines; for (i = 0; i < f->num_engines; i++) { struct fifo_engine_info_gk20a *info = - &f->engine_info[engines->info[i].engine_id]; + &f->engine_info[engines->info[i].engine_id]; if (engines->info[i].engine_id >= f->max_engines) { nvgpu_err(f->g, "engine id %d larger than max %d", @@ -263,7 +263,8 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g) sizeof(*f->engine_info)); f->active_engines_list = nvgpu_kzalloc(g, f->max_engines * sizeof(u32)); - if (!(f->channel && f->tsg && f->engine_info && f->active_engines_list)) { + if (!(f->channel && f->tsg && f->engine_info && + f->active_engines_list)) { err = -ENOMEM; goto clean_up; } @@ -446,171 +447,6 @@ int vgpu_fifo_preempt_tsg(struct gk20a *g, struct tsg_gk20a *tsg) return err; } -static int vgpu_submit_runlist(struct gk20a *g, u64 handle, u8 runlist_id, - u16 *runlist, u32 num_entries) -{ - struct tegra_vgpu_cmd_msg msg; - struct tegra_vgpu_runlist_params *p; - int err; - void *oob_handle; - void *oob; - size_t size, oob_size; - - oob_handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(), - TEGRA_VGPU_QUEUE_CMD, - &oob, &oob_size); - if (!oob_handle) { - return -EINVAL; - } - - size = sizeof(*runlist) * num_entries; - if (oob_size < size) { - err = -ENOMEM; - goto done; - } - - msg.cmd = TEGRA_VGPU_CMD_SUBMIT_RUNLIST; - msg.handle = handle; - p = &msg.params.runlist; - p->runlist_id = runlist_id; - p->num_entries = num_entries; - - nvgpu_memcpy((u8 *)oob, (u8 *)runlist, size); - err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); - - err = (err || msg.ret) ? -1 : 0; - -done: - vgpu_ivc_oob_put_ptr(oob_handle); - return err; -} - -static bool vgpu_runlist_modify_active_locked(struct gk20a *g, u32 runlist_id, - struct channel_gk20a *ch, bool add) -{ - struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; - - runlist = &f->runlist_info[runlist_id]; - - if (add) { - if (test_and_set_bit((int)ch->chid, - runlist->active_channels)) { - return false; - /* was already there */ - } - } else { - if (!test_and_clear_bit((int)ch->chid, - runlist->active_channels)) { - /* wasn't there */ - return false; - } - } - - return true; -} - -static void vgpu_runlist_reconstruct_locked(struct gk20a *g, u32 runlist_id, - bool add_entries) -{ - struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; - - runlist = &f->runlist_info[runlist_id]; - - if (add_entries) { - u16 *runlist_entry; - u32 count = 0; - unsigned long chid; - - runlist_entry = runlist->mem[0].cpu_va; - - nvgpu_assert(f->num_channels <= (unsigned int)U16_MAX); - for_each_set_bit(chid, - runlist->active_channels, f->num_channels) { - nvgpu_log_info(g, "add channel %lu to runlist", chid); - *runlist_entry++ = (u16)chid; - count++; - } - - runlist->count = count; - } else { - runlist->count = 0; - } -} - -static int vgpu_runlist_update_locked(struct gk20a *g, u32 runlist_id, - struct channel_gk20a *ch, bool add, - bool wait_for_finish) -{ - struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; - bool add_entries; - - nvgpu_log_fn(g, " "); - - if (ch != NULL) { - bool update = vgpu_runlist_modify_active_locked(g, runlist_id, - ch, add); - if (!update) { - /* no change in runlist contents */ - return 0; - } - /* had a channel to update, so reconstruct */ - add_entries = true; - } else { - /* no channel; add means update all, !add means clear all */ - add_entries = add; - } - - runlist = &f->runlist_info[runlist_id]; - - vgpu_runlist_reconstruct_locked(g, runlist_id, add_entries); - - return vgpu_submit_runlist(g, vgpu_get_handle(g), runlist_id, - runlist->mem[0].cpu_va, runlist->count); -} - -/* add/remove a channel from runlist - special cases below: runlist->active_channels will NOT be changed. - (ch == NULL && !add) means remove all active channels from runlist. - (ch == NULL && add) means restore all active channels on runlist. */ -static int vgpu_runlist_update(struct gk20a *g, u32 runlist_id, - struct channel_gk20a *ch, - bool add, bool wait_for_finish) -{ - struct fifo_runlist_info_gk20a *runlist = NULL; - struct fifo_gk20a *f = &g->fifo; - int ret; - - nvgpu_log_fn(g, " "); - - runlist = &f->runlist_info[runlist_id]; - - nvgpu_mutex_acquire(&runlist->runlist_lock); - - ret = vgpu_runlist_update_locked(g, runlist_id, ch, add, - wait_for_finish); - - nvgpu_mutex_release(&runlist->runlist_lock); - return ret; -} - -int vgpu_runlist_update_for_channel(struct gk20a *g, u32 runlist_id, - struct channel_gk20a *ch, - bool add, bool wait_for_finish) -{ - nvgpu_assert(ch != NULL); - - return vgpu_runlist_update(g, runlist_id, ch, add, wait_for_finish); -} - -int vgpu_runlist_reload(struct gk20a *g, u32 runlist_id, - bool add, bool wait_for_finish) -{ - return vgpu_runlist_update(g, runlist_id, NULL, add, wait_for_finish); -} - int vgpu_fifo_wait_engine_idle(struct gk20a *g) { nvgpu_log_fn(g, " "); @@ -618,27 +454,6 @@ int vgpu_fifo_wait_engine_idle(struct gk20a *g) return 0; } -int vgpu_runlist_set_interleave(struct gk20a *g, - u32 id, - u32 runlist_id, - u32 new_level) -{ - struct tegra_vgpu_cmd_msg msg = {0}; - struct tegra_vgpu_tsg_runlist_interleave_params *p = - &msg.params.tsg_interleave; - int err; - - nvgpu_log_fn(g, " "); - - msg.cmd = TEGRA_VGPU_CMD_TSG_SET_RUNLIST_INTERLEAVE; - msg.handle = vgpu_get_handle(g); - p->tsg_id = id; - p->level = new_level; - err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); - WARN_ON(err || msg.ret); - return err ? err : msg.ret; -} - int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch, u32 err_code, bool verbose) { @@ -747,7 +562,7 @@ int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info) break; case TEGRA_VGPU_FIFO_INTR_CTXSW_TIMEOUT: g->ops.fifo.set_error_notifier(ch, - NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT); + NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT); break; case TEGRA_VGPU_FIFO_INTR_MMU_FAULT: vgpu_fifo_set_ctx_mmu_error_ch_tsg(g, ch); diff --git a/drivers/gpu/nvgpu/common/vgpu/fifo_vgpu.h b/drivers/gpu/nvgpu/common/vgpu/fifo/fifo_vgpu.h similarity index 88% rename from drivers/gpu/nvgpu/common/vgpu/fifo_vgpu.h rename to drivers/gpu/nvgpu/common/vgpu/fifo/fifo_vgpu.h index c40f5f445..dde627929 100644 --- a/drivers/gpu/nvgpu/common/vgpu/fifo_vgpu.h +++ b/drivers/gpu/nvgpu/common/vgpu/fifo/fifo_vgpu.h @@ -43,16 +43,7 @@ int vgpu_channel_setup_ramfc(struct channel_gk20a *ch, u64 gpfifo_base, int vgpu_fifo_init_engine_info(struct fifo_gk20a *f); int vgpu_fifo_preempt_channel(struct gk20a *g, struct channel_gk20a *ch); int vgpu_fifo_preempt_tsg(struct gk20a *g, struct tsg_gk20a *tsg); -int vgpu_runlist_update_for_channel(struct gk20a *g, u32 runlist_id, - struct channel_gk20a *ch, - bool add, bool wait_for_finish); -int vgpu_runlist_reload(struct gk20a *g, u32 runlist_id, - bool add, bool wait_for_finish); int vgpu_fifo_wait_engine_idle(struct gk20a *g); -int vgpu_runlist_set_interleave(struct gk20a *g, - u32 id, - u32 runlist_id, - u32 new_level); int vgpu_channel_set_timeslice(struct channel_gk20a *ch, u32 timeslice); int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch, u32 err_code, bool verbose); diff --git a/drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.c b/drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.c new file mode 100644 index 000000000..0f493a685 --- /dev/null +++ b/drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.c @@ -0,0 +1,220 @@ +/* + * Virtualized GPU Runlist + * + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "runlist_vgpu.h" + +static int vgpu_submit_runlist(struct gk20a *g, u64 handle, u8 runlist_id, + u16 *runlist, u32 num_entries) +{ + struct tegra_vgpu_cmd_msg msg; + struct tegra_vgpu_runlist_params *p; + int err; + void *oob_handle; + void *oob; + size_t size, oob_size; + + oob_handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(), + TEGRA_VGPU_QUEUE_CMD, + &oob, &oob_size); + if (!oob_handle) { + return -EINVAL; + } + + size = sizeof(*runlist) * num_entries; + if (oob_size < size) { + err = -ENOMEM; + goto done; + } + + msg.cmd = TEGRA_VGPU_CMD_SUBMIT_RUNLIST; + msg.handle = handle; + p = &msg.params.runlist; + p->runlist_id = runlist_id; + p->num_entries = num_entries; + + nvgpu_memcpy((u8 *)oob, (u8 *)runlist, size); + err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); + + err = (err || msg.ret) ? -1 : 0; + +done: + vgpu_ivc_oob_put_ptr(oob_handle); + return err; +} + +static bool vgpu_runlist_modify_active_locked(struct gk20a *g, u32 runlist_id, + struct channel_gk20a *ch, bool add) +{ + struct fifo_gk20a *f = &g->fifo; + struct fifo_runlist_info_gk20a *runlist; + + runlist = &f->runlist_info[runlist_id]; + + if (add) { + if (test_and_set_bit((int)ch->chid, + runlist->active_channels)) { + return false; + /* was already there */ + } + } else { + if (!test_and_clear_bit((int)ch->chid, + runlist->active_channels)) { + /* wasn't there */ + return false; + } + } + + return true; +} + +static void vgpu_runlist_reconstruct_locked(struct gk20a *g, u32 runlist_id, + bool add_entries) +{ + struct fifo_gk20a *f = &g->fifo; + struct fifo_runlist_info_gk20a *runlist; + + runlist = &f->runlist_info[runlist_id]; + + if (add_entries) { + u16 *runlist_entry; + u32 count = 0; + unsigned long chid; + + runlist_entry = runlist->mem[0].cpu_va; + + nvgpu_assert(f->num_channels <= (unsigned int)U16_MAX); + for_each_set_bit(chid, + runlist->active_channels, f->num_channels) { + nvgpu_log_info(g, "add channel %lu to runlist", chid); + *runlist_entry++ = (u16)chid; + count++; + } + + runlist->count = count; + } else { + runlist->count = 0; + } +} + +static int vgpu_runlist_update_locked(struct gk20a *g, u32 runlist_id, + struct channel_gk20a *ch, bool add, + bool wait_for_finish) +{ + struct fifo_gk20a *f = &g->fifo; + struct fifo_runlist_info_gk20a *runlist; + bool add_entries; + + nvgpu_log_fn(g, " "); + + if (ch != NULL) { + bool update = vgpu_runlist_modify_active_locked(g, runlist_id, + ch, add); + if (!update) { + /* no change in runlist contents */ + return 0; + } + /* had a channel to update, so reconstruct */ + add_entries = true; + } else { + /* no channel; add means update all, !add means clear all */ + add_entries = add; + } + + runlist = &f->runlist_info[runlist_id]; + + vgpu_runlist_reconstruct_locked(g, runlist_id, add_entries); + + return vgpu_submit_runlist(g, vgpu_get_handle(g), runlist_id, + runlist->mem[0].cpu_va, runlist->count); +} + +/* add/remove a channel from runlist + special cases below: runlist->active_channels will NOT be changed. + (ch == NULL && !add) means remove all active channels from runlist. + (ch == NULL && add) means restore all active channels on runlist. */ +static int vgpu_runlist_update(struct gk20a *g, u32 runlist_id, + struct channel_gk20a *ch, + bool add, bool wait_for_finish) +{ + struct fifo_runlist_info_gk20a *runlist = NULL; + struct fifo_gk20a *f = &g->fifo; + u32 ret = 0; + + nvgpu_log_fn(g, " "); + + runlist = &f->runlist_info[runlist_id]; + + nvgpu_mutex_acquire(&runlist->runlist_lock); + + ret = vgpu_runlist_update_locked(g, runlist_id, ch, add, + wait_for_finish); + + nvgpu_mutex_release(&runlist->runlist_lock); + return ret; +} + +int vgpu_runlist_update_for_channel(struct gk20a *g, u32 runlist_id, + struct channel_gk20a *ch, + bool add, bool wait_for_finish) +{ + nvgpu_assert(ch != NULL); + + return vgpu_runlist_update(g, runlist_id, ch, add, wait_for_finish); +} + +int vgpu_runlist_reload(struct gk20a *g, u32 runlist_id, + bool add, bool wait_for_finish) +{ + return vgpu_runlist_update(g, runlist_id, NULL, add, wait_for_finish); +} + +int vgpu_runlist_set_interleave(struct gk20a *g, + u32 id, + u32 runlist_id, + u32 new_level) +{ + struct tegra_vgpu_cmd_msg msg = {0}; + struct tegra_vgpu_tsg_runlist_interleave_params *p = + &msg.params.tsg_interleave; + int err; + + nvgpu_log_fn(g, " "); + + msg.cmd = TEGRA_VGPU_CMD_TSG_SET_RUNLIST_INTERLEAVE; + msg.handle = vgpu_get_handle(g); + p->tsg_id = id; + p->level = new_level; + err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); + WARN_ON(err || msg.ret); + return err ? err : msg.ret; +} diff --git a/drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.h b/drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.h new file mode 100644 index 000000000..671d5ce40 --- /dev/null +++ b/drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.h @@ -0,0 +1,36 @@ +/* + * Virtualized GPU Runlist + * + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +struct gk20a; +struct channel_gk20a; + +int vgpu_runlist_update_for_channel(struct gk20a *g, u32 runlist_id, + struct channel_gk20a *ch, + bool add, bool wait_for_finish); +int vgpu_runlist_reload(struct gk20a *g, u32 runlist_id, + bool add, bool wait_for_finish); +int vgpu_runlist_set_interleave(struct gk20a *g, + u32 id, + u32 runlist_id, + u32 new_level); diff --git a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_fifo_gv11b.c b/drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.c similarity index 99% rename from drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_fifo_gv11b.c rename to drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.c index 390f783eb..dffb44845 100644 --- a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_fifo_gv11b.c +++ b/drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.c @@ -28,7 +28,7 @@ #include #include "gv11b/fifo_gv11b.h" -#include "vgpu_fifo_gv11b.h" +#include "common/vgpu/fifo/vgpu_fifo_gv11b.h" #ifdef CONFIG_TEGRA_GK20A_NVHOST diff --git a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_fifo_gv11b.h b/drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.h similarity index 100% rename from drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_fifo_gv11b.h rename to drivers/gpu/nvgpu/common/vgpu/fifo/vgpu_fifo_gv11b.h diff --git a/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c index 49e2e75ab..600676983 100644 --- a/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c @@ -41,7 +41,8 @@ #include "common/fifo/runlist_gk20a.h" #include "common/fifo/channel_gm20b.h" -#include "common/vgpu/fifo_vgpu.h" +#include "common/vgpu/fifo/fifo_vgpu.h" +#include "common/vgpu/fifo/runlist_vgpu.h" #include "common/vgpu/gr_vgpu.h" #include "common/vgpu/ltc_vgpu.h" #include "common/vgpu/mm_vgpu.h" diff --git a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c index 1f13437d6..e8c693ca6 100644 --- a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c @@ -52,7 +52,8 @@ #include #include -#include "common/vgpu/fifo_vgpu.h" +#include "common/vgpu/fifo/fifo_vgpu.h" +#include "common/vgpu/fifo/runlist_vgpu.h" #include "common/vgpu/gr_vgpu.h" #include "common/vgpu/ltc_vgpu.h" #include "common/vgpu/mm_vgpu.h" @@ -60,6 +61,7 @@ #include "common/vgpu/perf/perf_vgpu.h" #include "common/vgpu/fecs_trace_vgpu.h" #include "common/vgpu/perf/cyclestats_snapshot_vgpu.h" +#include "common/vgpu/fifo/vgpu_fifo_gv11b.h" #include "common/vgpu/gm20b/vgpu_gr_gm20b.h" #include "common/vgpu/gp10b/vgpu_mm_gp10b.h" #include "common/vgpu/gp10b/vgpu_gr_gp10b.h" @@ -93,7 +95,7 @@ #include "vgpu_gv11b.h" #include "vgpu_gr_gv11b.h" -#include "vgpu_fifo_gv11b.h" + #include "vgpu_subctx_gv11b.h" #include "vgpu_tsg_gv11b.h" diff --git a/drivers/gpu/nvgpu/common/vgpu/tsg_vgpu.c b/drivers/gpu/nvgpu/common/vgpu/tsg_vgpu.c index 19d0a05d3..a777c8041 100644 --- a/drivers/gpu/nvgpu/common/vgpu/tsg_vgpu.c +++ b/drivers/gpu/nvgpu/common/vgpu/tsg_vgpu.c @@ -28,7 +28,7 @@ #include #include -#include "fifo_vgpu.h" +#include "fifo/fifo_vgpu.h" int vgpu_tsg_open(struct tsg_gk20a *tsg) {