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gpu: nvgpu: incr sync once submit is ready to go
Split out the max value increment and syncpt interrupt registration out of nvgpu_channel_sync_incr*(). This API is called in the submit path to prepare buffers and tracking resources, but later on in the submit path errors can still occur so that the increment wouldn't happen (unless artificially forced by sw). The increment and irq registration cannot easily be undone and it makes more sense to do these at the moment when the prepared job is finally ready, so add a new nvgpu_channel_sync_mark_progress() API to be called later in the submit path to signal that progress shall eventually happen on the sync. Without this, the max value would stay too large after an unsuccessful submit until the channel gets closed. The sync object (syncpt or semaphore) is always exclusively owned by the channel that allocated it, so nonatomically reading the max value first in sync_incr() and incrementing it later in mark_progress() is racefree; all submits per channel are serialized. Change the channel syncpoint to client managed from host managed so that nvhost-exported sync fences behave correctly with the temporary state where the fence threshold is over the max value. Ideally we'd always track nvgpu-owned syncpts' max values internally, but this is enough for now. Jira NVGPU-5491 Change-Id: Idf0bda7ac93d7f2f114cdeb497fe6b5369d21c95 Signed-off-by: Konsta Hölttä <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2340465 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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committed by
Alex Waterman
parent
dbbe6b67be
commit
d916e85171
@@ -65,17 +65,22 @@ int nvgpu_channel_sync_wait_fence_fd(struct nvgpu_channel_sync *s, int fd,
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int nvgpu_channel_sync_incr(struct nvgpu_channel_sync *s,
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struct priv_cmd_entry **entry, struct nvgpu_fence_type *fence,
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bool need_sync_fence, bool register_irq)
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bool need_sync_fence)
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{
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return s->ops->incr(s, entry, fence, need_sync_fence, register_irq);
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return s->ops->incr(s, entry, fence, need_sync_fence);
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}
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int nvgpu_channel_sync_incr_user(struct nvgpu_channel_sync *s,
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struct priv_cmd_entry **entry, struct nvgpu_fence_type *fence,
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bool wfi, bool need_sync_fence, bool register_irq)
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bool wfi, bool need_sync_fence)
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{
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return s->ops->incr_user(s, entry, fence, wfi, need_sync_fence,
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register_irq);
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return s->ops->incr_user(s, entry, fence, wfi, need_sync_fence);
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}
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void nvgpu_channel_sync_mark_progress(struct nvgpu_channel_sync *s,
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bool register_irq)
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{
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s->ops->mark_progress(s, register_irq);
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}
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void nvgpu_channel_sync_set_min_eq_max(struct nvgpu_channel_sync *s)
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