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gpu: nvgpu: move deferred interrupt wait to common code
- Deferred interrupt wait uses nvgpu abstraction so can be made common for QNX/Linux. Jira NVGPU-1396 Change-Id: Iaabc5f004d702ba1dc3fba62778ae1b7044f0392 Signed-off-by: Shashank Singh <shashsingh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1975137 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -50,8 +50,8 @@ static void nvgpu_init_vars(struct gk20a *g)
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struct device *dev = dev_from_gk20a(g);
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struct gk20a_platform *platform = dev_get_drvdata(dev);
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nvgpu_cond_init(&l->sw_irq_stall_last_handled_wq);
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nvgpu_cond_init(&l->sw_irq_nonstall_last_handled_wq);
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nvgpu_cond_init(&g->sw_irq_stall_last_handled_cond);
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nvgpu_cond_init(&g->sw_irq_nonstall_last_handled_cond);
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init_rwsem(&l->busy_lock);
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nvgpu_rwsem_init(&g->deterministic_busy);
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@@ -297,46 +297,6 @@ int nvgpu_probe(struct gk20a *g,
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return 0;
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}
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/**
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* cyclic_delta - Returns delta of cyclic integers a and b.
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*
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* @a - First integer
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* @b - Second integer
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*
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* Note: if a is ahead of b, delta is positive.
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*/
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static int cyclic_delta(int a, int b)
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{
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return a - b;
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}
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/**
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* nvgpu_wait_for_deferred_interrupts - Wait for interrupts to complete
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*
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* @g - The GPU to wait on.
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*
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* Waits until all interrupt handlers that have been scheduled to run have
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* completed.
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*/
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void nvgpu_wait_for_deferred_interrupts(struct gk20a *g)
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{
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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int stall_irq_threshold = atomic_read(&l->hw_irq_stall_count);
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int nonstall_irq_threshold = atomic_read(&l->hw_irq_nonstall_count);
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/* wait until all stalling irqs are handled */
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NVGPU_COND_WAIT(&l->sw_irq_stall_last_handled_wq,
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cyclic_delta(stall_irq_threshold,
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atomic_read(&l->sw_irq_stall_last_handled))
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<= 0, 0);
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/* wait until all non-stalling irqs are handled */
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NVGPU_COND_WAIT(&l->sw_irq_nonstall_last_handled_wq,
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cyclic_delta(nonstall_irq_threshold,
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atomic_read(&l->sw_irq_nonstall_last_handled))
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<= 0, 0);
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}
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static void nvgpu_free_gk20a(struct gk20a *g)
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{
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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