nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 17:36:20 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: Remove unused GK20A cooling device

Browse Source 
Removed unused, obsolete GK20A cooling device.

Bug 1450787

Change-Id: I5b02546d0405dd518ec841d903e650a8d38db8f2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/437942
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
This commit is contained in:
Alex Frid
2014-07-14 19:25:43 -07:00
committed by Dan Willemsen
parent ba387d3d7e
commit d98099c9b6
3 changed files with 0 additions and 108 deletions
Download Patch File Download Diff File Expand all files Collapse all files

41
drivers/gpu/nvgpu/gk20a/clk_gk20a.c
View File

@@ -42,19 +42,6 @@ struct pll_parms gpc_pll_params = {
1, 32, /* PL */
};
static int num_gpu_cooling_freq;
static struct gpufreq_table_data *gpu_cooling_freq;
struct gpufreq_table_data *tegra_gpufreq_table_get(void)
{
return gpu_cooling_freq;
}
unsigned int tegra_gpufreq_table_size_get(void)
{
return num_gpu_cooling_freq;
}
static u8 pl_to_div[] = {
/* PL: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 */
/* p: */ 1, 2, 3, 4, 5, 6, 8, 10, 12, 16, 12, 16, 20, 24, 32 };
@@ -441,8 +428,6 @@ static int gk20a_init_clk_setup_sw(struct gk20a *g)
{
struct clk_gk20a *clk = &g->clk;
static int initialized;
unsigned long *freqs;
int err, num_freqs;
struct clk *ref;
unsigned long ref_rate;
@@ -480,32 +465,6 @@ static int gk20a_init_clk_setup_sw(struct gk20a *g)
clk->gpc_pll.freq /= pl_to_div[clk->gpc_pll.PL];
}
err = tegra_dvfs_get_freqs(clk_get_parent(clk->tegra_clk),
&freqs, &num_freqs);
if (!err) {
int i, j;
/* init j for inverse traversal of frequencies */
j = num_freqs - 1;
gpu_cooling_freq = kzalloc(
(1 + num_freqs) * sizeof(*gpu_cooling_freq),
GFP_KERNEL);
/* store frequencies in inverse order */
for (i = 0; i < num_freqs; ++i, --j) {
gpu_cooling_freq[i].index = i;
gpu_cooling_freq[i].frequency = freqs[j];
}
/* add 'end of table' marker */
gpu_cooling_freq[i].index = i;
gpu_cooling_freq[i].frequency = GPUFREQ_TABLE_END;
/* store number of frequencies */
num_gpu_cooling_freq = num_freqs + 1;
}
mutex_init(&clk->clk_mutex);
clk->sw_ready = true;

9
drivers/gpu/nvgpu/gk20a/clk_gk20a.h
View File

@@ -58,15 +58,6 @@ struct clk_gk20a {
bool clk_hw_on;
};
struct gpufreq_table_data {
unsigned int index;
unsigned int frequency; /* Hz */
};
struct gpufreq_table_data *tegra_gpufreq_table_get(void);
unsigned int tegra_gpufreq_table_size_get(void);
int gk20a_init_clk_support(struct gk20a *g);
unsigned long gk20a_clk_get_rate(struct gk20a *g);

58
drivers/gpu/nvgpu/gk20a/gk20a.c
View File

@@ -651,9 +651,6 @@ static void gk20a_remove_support(struct platform_device *dev)
if (g->pmu.remove_support)
g->pmu.remove_support(&g->pmu);
if (g->gk20a_cdev.gk20a_cooling_dev)
thermal_cooling_device_unregister(g->gk20a_cdev.gk20a_cooling_dev);
if (g->gr.remove_support)
g->gr.remove_support(&g->gr);
@@ -1009,53 +1006,6 @@ static struct of_device_id tegra_gk20a_of_match[] = {
{ },
};
int tegra_gpu_get_max_state(struct thermal_cooling_device *cdev,
unsigned long *max_state)
{
struct cooling_device_gk20a *gk20a_gpufreq_device = cdev->devdata;
*max_state = gk20a_gpufreq_device->gk20a_freq_table_size - 1;
return 0;
}
int tegra_gpu_get_cur_state(struct thermal_cooling_device *cdev,
unsigned long *cur_state)
{
struct cooling_device_gk20a *gk20a_gpufreq_device = cdev->devdata;
*cur_state = gk20a_gpufreq_device->gk20a_freq_state;
return 0;
}
int tegra_gpu_set_cur_state(struct thermal_cooling_device *c_dev,
unsigned long cur_state)
{
u32 target_freq;
struct gk20a *g;
struct gpufreq_table_data *gpu_cooling_table;
struct cooling_device_gk20a *gk20a_gpufreq_device = c_dev->devdata;
BUG_ON(cur_state >= gk20a_gpufreq_device->gk20a_freq_table_size);
g = container_of(gk20a_gpufreq_device, struct gk20a, gk20a_cdev);
gpu_cooling_table = tegra_gpufreq_table_get();
target_freq = gpu_cooling_table[cur_state].frequency;
/* ensure a query for state will get the proper value */
gk20a_gpufreq_device->gk20a_freq_state = cur_state;
gk20a_clk_set_rate(g, target_freq);
return 0;
}
static struct thermal_cooling_device_ops tegra_gpu_cooling_ops = {
.get_max_state = tegra_gpu_get_max_state,
.get_cur_state = tegra_gpu_get_cur_state,
.set_cur_state = tegra_gpu_set_cur_state,
};
static int gk20a_create_device(
struct platform_device *pdev, int devno, const char *cdev_name,
struct cdev *cdev, struct device **out,
@@ -1421,7 +1371,6 @@ static int gk20a_probe(struct platform_device *dev)
struct gk20a *gk20a;
int err;
struct gk20a_platform *platform = NULL;
struct cooling_device_gk20a *gpu_cdev = NULL;
if (dev->dev.of_node) {
const struct of_device_id *match;
@@ -1525,13 +1474,6 @@ static int gk20a_probe(struct platform_device *dev)
dev->dev.dma_parms = &gk20a->dma_parms;
dma_set_max_seg_size(&dev->dev, UINT_MAX);
gpu_cdev = &gk20a->gk20a_cdev;
gpu_cdev->gk20a_freq_table_size = tegra_gpufreq_table_size_get();
gpu_cdev->gk20a_freq_state = 0;
gpu_cdev->g = gk20a;
gpu_cdev->gk20a_cooling_dev = thermal_cooling_device_register("gk20a_cdev", gpu_cdev,
&tegra_gpu_cooling_ops);
gk20a->gr_idle_timeout_default =
CONFIG_GK20A_DEFAULT_TIMEOUT;
if (tegra_platform_is_silicon())