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gpu: nvgpu: gv11b: fifo recovery for nonreplay fault

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Host will no longer receive replayable or non-replayable fault requests.
MMU will handle both types of fault reporting. This means that Host will no
longer automatically disable scheduling or preempt a PBDMA when an engine
page faults. After fault happens, engine will stall on its own fault and
will not context switch until the fault is serviced

JIRA GPUT19X-7

Change-Id: I8039e6f50d87f43e101d1372faa5ca6fb739036e
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1493417
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Seema Khowala
2017-03-28 14:36:02 -07:00
committed by mobile promotions
parent 2f6d321390
commit d9ee7aff04
1 changed files with 18 additions and 5 deletions
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23
drivers/gpu/nvgpu/gv11b/fb_gv11b.c
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@@ -966,6 +966,9 @@ static void gv11b_fb_copy_from_hw_fault_buf(struct gk20a *g,
static void gv11b_fb_handle_mmu_fault_common(struct gk20a *g,
struct mmu_fault_info *mmfault)
{
unsigned int id_type;
u32 act_eng_bitmask = 0;
if (!mmfault->valid)
return;
@@ -977,13 +980,23 @@ static void gv11b_fb_handle_mmu_fault_common(struct gk20a *g,
* instance block, the fault cannot be isolated to a
* single context so we need to reset the entire runlist
*/
nvgpu_log(g, gpu_dbg_intr, "UNBOUND INST");
id_type = ID_TYPE_UNKNOWN;
nvgpu_log(g, gpu_dbg_intr, "UNBOUND INST BLOCK MMU FAULT");
} else if (mmfault->refch) {
if (gk20a_is_channel_marked_as_tsg(mmfault->refch))
id_type = ID_TYPE_TSG;
else
id_type = ID_TYPE_CHANNEL;
} else {
id_type = ID_TYPE_UNKNOWN;
}
if (mmfault->refch) {
gk20a_channel_put(mmfault->refch);
mmfault->refch = NULL;
}
if (mmfault->faulted_engine != FIFO_INVAL_ENGINE_ID)
act_eng_bitmask = BIT(mmfault->faulted_engine);
g->ops.fifo.teardown_ch_tsg(g, act_eng_bitmask, mmfault->chid,
id_type, RC_TYPE_MMU_FAULT, mmfault);
}
static void gv11b_fb_handle_mmu_nonreplay_replay_fault(struct gk20a *g,