From d9f1ee6d842c23eed5bdc78cbef045af2a18154e Mon Sep 17 00:00:00 2001 From: Philip Elcan Date: Wed, 8 May 2019 09:52:57 -0400 Subject: [PATCH] gpu: nvgpu: init: fix MISRA violations Fix Rule 17.7 and 4.7 violations for not using return values from functions. JIRA NVGPU-3286 Change-Id: I1138b3ae578b15e2cabdefc1088fc5cfe3e79681 Signed-off-by: Philip Elcan Reviewed-on: https://git-master.nvidia.com/r/2114655 Reviewed-by: svc-mobile-coverity Reviewed-by: Deepak Nibade GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/init/hal_init.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/init/hal_init.c b/drivers/gpu/nvgpu/hal/init/hal_init.c index ab1692907..d67557798 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_init.c +++ b/drivers/gpu/nvgpu/hal/init/hal_init.c @@ -87,12 +87,18 @@ int nvgpu_init_hal(struct gk20a *g) int nvgpu_detect_chip(struct gk20a *g) { struct nvgpu_gpu_params *p = &g->params; + u32 boot_0; + int err; if (p->gpu_arch != 0U) { return 0; } - nvgpu_mc_boot_0(g, &p->gpu_arch, &p->gpu_impl, &p->gpu_rev); + boot_0 = nvgpu_mc_boot_0(g, &p->gpu_arch, &p->gpu_impl, &p->gpu_rev); + if (boot_0 == U32_MAX) { + nvgpu_err(g, "nvgpu_mc_boot_0 failure!"); + return -ENODEV; + } if ((p->gpu_arch + p->gpu_impl) == (u32)NVGPU_GPUID_GV11B) { /* overwrite gpu revison for A02 */ @@ -105,5 +111,11 @@ int nvgpu_detect_chip(struct gk20a *g) g->params.gpu_impl, g->params.gpu_rev); - return nvgpu_init_hal(g); + err = nvgpu_init_hal(g); + if (err != 0) { + nvgpu_err(g, "nvgpu_init_hal failure!"); + return err; + } + + return 0; }