gpu: nvgpu: return instance specific max subctx count

nvgpu_channel_get_max_subctx_count() right now always returns max subctx
count for 0th instance. Update this function to return max subctx count
for GPU instance for which channel is allocated.

For CE channels that are allocated and managed by nvgpu, cdev pointer is
not set in channel private data (since it is assigned in OS specific
code). For those channels continue returning max subctx count for 0th
instance. CE channels should not need subcontexts anyways.

Add nvgpu_cdev pointer in struct nvgpu_channel_linux. Assign it in
__gk20a_channel_open() and clear it in gk20a_channel_release()

Move code to get runlist and gpu_instance_id after nvgpu_get() call.
Accesses to gk20a pointer should always come after nvgpu_get().
Also add a debug print to dump runlist_id and gpu_instance_id being
used for channel.

Jira NVGPU-5648

Change-Id: Idf58ccefdb7dc9fec78100f79c647e5a00b8fb29
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2438924
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit

drivers/gpu/nvgpu/os/linux/channel.h

@@ -28,6 +28,7 @@ struct nvgpu_channel_fence;
 struct nvgpu_fence_type;
 struct nvgpu_swprofile;
 struct nvgpu_os_linux;
+struct nvgpu_cdev;
 
 struct sync_fence;
 struct sync_timeline;
@@ -92,6 +93,8 @@ struct nvgpu_channel_linux {
 	struct dma_buf *cyclestate_buffer_handler;
 
 	struct nvgpu_usermode_bufs_linux usermode;
+
+	struct nvgpu_cdev *cdev;
 };
 
 u32 nvgpu_submit_gpfifo_user_flags_to_common_flags(u32 user_flags);

drivers/gpu/nvgpu/os/linux/ioctl_channel.c

@@ -429,6 +429,7 @@ struct nvgpu_channel *nvgpu_channel_get_from_file(int fd)
 int gk20a_channel_release(struct inode *inode, struct file *filp)
 {
 	struct channel_priv *priv = filp->private_data;
+	struct nvgpu_channel_linux *os_priv;
 	struct nvgpu_channel *ch;
 	struct gk20a *g;
 
@@ -443,6 +444,9 @@ int gk20a_channel_release(struct inode *inode, struct file *filp)
 	ch = priv->c;
 	g = priv->g;
 
+	os_priv = ch->os_priv;
+	os_priv->cdev = NULL;
+
 	err = gk20a_busy(g);
 	if (err) {
 		nvgpu_err(g, "failed to release a channel!");
@@ -472,11 +476,16 @@ static int __gk20a_channel_open(struct gk20a *g, struct nvgpu_cdev *cdev,
 	int err;
 	struct nvgpu_channel *ch;
 	struct channel_priv *priv;
+	struct nvgpu_channel_linux *os_priv;
 	u32 tmp_runlist_id;
 	u32 gpu_instance_id;
 
 	nvgpu_log_fn(g, " ");
 
+	g = nvgpu_get(g);
+	if (!g)
+		return -ENODEV;
+
 	gpu_instance_id = nvgpu_get_gpu_instance_id_from_cdev(g, cdev);
 	nvgpu_assert(gpu_instance_id < g->mig.num_gpu_instances);
 
@@ -491,10 +500,6 @@ static int __gk20a_channel_open(struct gk20a *g, struct nvgpu_cdev *cdev,
 		}
 	}
 
-	g = nvgpu_get(g);
-	if (!g)
-		return -ENODEV;
-
 #ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_channel_open(dev_name(dev_from_gk20a(g)));
 #endif
@@ -530,6 +535,12 @@ static int __gk20a_channel_open(struct gk20a *g, struct nvgpu_cdev *cdev,
 	priv->c = ch;
 	priv->cdev = cdev;
 
+	os_priv = ch->os_priv;
+	os_priv->cdev = cdev;
+
+	nvgpu_log(g, gpu_dbg_mig, "Use runlist %u for channel %u on GPU instance %u",
+		tmp_runlist_id, ch->chid, gpu_instance_id);
+
 	filp->private_data = priv;
 	return 0;
 

drivers/gpu/nvgpu/os/linux/linux-channel.c

@@ -33,6 +33,7 @@
 
 #include "channel.h"
 #include "ioctl_channel.h"
+#include "ioctl.h"
 #include "os_linux.h"
 #include "dmabuf_priv.h"
 
@@ -631,10 +632,19 @@ u32 nvgpu_get_gpfifo_entry_size(void)
 
 u32 nvgpu_channel_get_max_subctx_count(struct nvgpu_channel *ch)
 {
+	struct nvgpu_channel_linux *priv = ch->os_priv;
 	struct gk20a *g = ch->g;
+	u32 gpu_instance_id;
 
-	return nvgpu_grmgr_get_gpu_instance_max_veid_count(g,
+	if (priv->cdev == NULL) {
-		0U);
+		/* CE channels reserved by nvgpu do not have cdev pointer */
+		return nvgpu_grmgr_get_gpu_instance_max_veid_count(g, 0U);
+	}
+
+	gpu_instance_id = nvgpu_get_gpu_instance_id_from_cdev(g, priv->cdev);
+	nvgpu_assert(gpu_instance_id < g->mig.num_gpu_instances);
+
+	return nvgpu_grmgr_get_gpu_instance_max_veid_count(g, gpu_instance_id);
 }
 
 #ifdef CONFIG_DEBUG_FS