gpu: nvgpu: remove clk_arb.h to gk20a.h circular dependency

clk_arb.h and gk20a.h has circular dependencies to each other. This is
removed by forward declaring struct gk20a in clk_arb.h and removing the
header gk20a.h from clk_arb.h and similarly forward declaring struct
nvgpu_clk_arb in gk20a.h and removing the header clk_arb.h from gk20a.h
alongwith putting headers in every execution unit which calls clk_arb.h
related methods.

JIRA NVGPU-597

Change-Id: I7cedca17206c148b21d93e5d7f0d88c2f98b979a
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1790915
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Debarshi Dutta
2018-08-02 11:48:44 +05:30
committed by mobile promotions
parent a09b9cd587
commit db7bb6548b
19 changed files with 27 additions and 5 deletions

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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -30,6 +30,8 @@ struct gk20a;
#include "ctrl/ctrlboardobj.h" #include "ctrl/ctrlboardobj.h"
#include "boardobj.h" #include "boardobj.h"
#include "boardobjgrpmask.h" #include "boardobjgrpmask.h"
#include <nvgpu/list.h>
#include <nvgpu/pmu.h>
/* /*
* Board Object Group destructor. * Board Object Group destructor.

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@@ -24,6 +24,7 @@
#include <nvgpu/soc.h> #include <nvgpu/soc.h>
#include <nvgpu/mm.h> #include <nvgpu/mm.h>
#include <nvgpu/io.h> #include <nvgpu/io.h>
#include <nvgpu/bug.h>
#include "gk20a/gk20a.h" #include "gk20a/gk20a.h"
#include "bus_gk20a.h" #include "bus_gk20a.h"

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@@ -20,6 +20,7 @@
* DEALINGS IN THE SOFTWARE. * DEALINGS IN THE SOFTWARE.
*/ */
#include <nvgpu/list.h>
#include <nvgpu/clk_arb.h> #include <nvgpu/clk_arb.h>
/** /**

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@@ -35,6 +35,7 @@
#include <nvgpu/mm.h> #include <nvgpu/mm.h>
#include <nvgpu/ctxsw_trace.h> #include <nvgpu/ctxsw_trace.h>
#include <nvgpu/soc.h> #include <nvgpu/soc.h>
#include <nvgpu/clk_arb.h>
#include <trace/events/gk20a.h> #include <trace/events/gk20a.h>

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@@ -41,6 +41,7 @@ struct nvgpu_nvhost_dev;
struct nvgpu_cpu_time_correlation_sample; struct nvgpu_cpu_time_correlation_sample;
struct nvgpu_mem_sgt; struct nvgpu_mem_sgt;
struct nvgpu_warpstate; struct nvgpu_warpstate;
struct nvgpu_clk_arb;
#ifdef CONFIG_GK20A_CTXSW_TRACE #ifdef CONFIG_GK20A_CTXSW_TRACE
struct nvgpu_ctxsw_trace_filter; struct nvgpu_ctxsw_trace_filter;
#endif #endif
@@ -59,7 +60,6 @@ struct nvgpu_ctxsw_trace_filter;
#include <nvgpu/atomic.h> #include <nvgpu/atomic.h>
#include <nvgpu/barrier.h> #include <nvgpu/barrier.h>
#include <nvgpu/rwsem.h> #include <nvgpu/rwsem.h>
#include <nvgpu/clk_arb.h>
#include <nvgpu/nvlink.h> #include <nvgpu/nvlink.h>
#include <nvgpu/sim.h> #include <nvgpu/sim.h>
#include <nvgpu/ecc.h> #include <nvgpu/ecc.h>

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@@ -32,6 +32,7 @@
#include <nvgpu/falcon.h> #include <nvgpu/falcon.h>
#include <nvgpu/mm.h> #include <nvgpu/mm.h>
#include <nvgpu/io.h> #include <nvgpu/io.h>
#include <nvgpu/clk_arb.h>
#include "gk20a.h" #include "gk20a.h"
#include "gr_gk20a.h" #include "gr_gk20a.h"

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@@ -34,6 +34,7 @@
#include <nvgpu/mm.h> #include <nvgpu/mm.h>
#include <nvgpu/enabled.h> #include <nvgpu/enabled.h>
#include <nvgpu/io.h> #include <nvgpu/io.h>
#include <nvgpu/bug.h>
#include <nvgpu/hw/gm20b/hw_ccsr_gm20b.h> #include <nvgpu/hw/gm20b/hw_ccsr_gm20b.h>
#include <nvgpu/hw/gm20b/hw_ram_gm20b.h> #include <nvgpu/hw/gm20b/hw_ram_gm20b.h>

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@@ -29,6 +29,8 @@
#include <nvgpu/kmem.h> #include <nvgpu/kmem.h>
#include <nvgpu/io.h> #include <nvgpu/io.h>
#include <nvgpu/list.h>
#include <nvgpu/clk_arb.h>
#include "gk20a/gk20a.h" #include "gk20a/gk20a.h"
#include "gp106/mclk_gp106.h" #include "gp106/mclk_gp106.h"

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@@ -28,6 +28,8 @@
#include <nvgpu/hw/gp106/hw_ccsr_gp106.h> #include <nvgpu/hw/gp106/hw_ccsr_gp106.h>
#include <nvgpu/hw/gp106/hw_fifo_gp106.h> #include <nvgpu/hw/gp106/hw_fifo_gp106.h>
#include <nvgpu/bug.h>
u32 gp106_fifo_get_num_fifos(struct gk20a *g) u32 gp106_fifo_get_num_fifos(struct gk20a *g)
{ {
return ccsr_channel__size_1_v(); return ccsr_channel__size_1_v();

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@@ -94,6 +94,7 @@
#include <nvgpu/enabled.h> #include <nvgpu/enabled.h>
#include <nvgpu/ctxsw_trace.h> #include <nvgpu/ctxsw_trace.h>
#include <nvgpu/error_notifier.h> #include <nvgpu/error_notifier.h>
#include <nvgpu/clk_arb.h>
#include <nvgpu/hw/gp106/hw_proj_gp106.h> #include <nvgpu/hw/gp106/hw_proj_gp106.h>
#include <nvgpu/hw/gp106/hw_fifo_gp106.h> #include <nvgpu/hw/gp106/hw_fifo_gp106.h>

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@@ -23,6 +23,7 @@
#include <nvgpu/pmu.h> #include <nvgpu/pmu.h>
#include <nvgpu/enabled.h> #include <nvgpu/enabled.h>
#include <nvgpu/io.h> #include <nvgpu/io.h>
#include <nvgpu/clk_arb.h>
#include "gk20a/gk20a.h" #include "gk20a/gk20a.h"
#include "gk20a/pmu_gk20a.h" #include "gk20a/pmu_gk20a.h"

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@@ -108,6 +108,7 @@
#include <nvgpu/enabled.h> #include <nvgpu/enabled.h>
#include <nvgpu/ctxsw_trace.h> #include <nvgpu/ctxsw_trace.h>
#include <nvgpu/error_notifier.h> #include <nvgpu/error_notifier.h>
#include <nvgpu/clk_arb.h>
#include <nvgpu/hw/gv100/hw_proj_gv100.h> #include <nvgpu/hw/gv100/hw_proj_gv100.h>
#include <nvgpu/hw/gv100/hw_fifo_gv100.h> #include <nvgpu/hw/gv100/hw_fifo_gv100.h>

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@@ -91,6 +91,7 @@
#include <nvgpu/enabled.h> #include <nvgpu/enabled.h>
#include <nvgpu/ctxsw_trace.h> #include <nvgpu/ctxsw_trace.h>
#include <nvgpu/error_notifier.h> #include <nvgpu/error_notifier.h>
#include <nvgpu/bug.h>
#include <nvgpu/hw/gv11b/hw_proj_gv11b.h> #include <nvgpu/hw/gv11b/hw_proj_gv11b.h>
#include <nvgpu/hw/gv11b/hw_fifo_gv11b.h> #include <nvgpu/hw/gv11b/hw_fifo_gv11b.h>

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@@ -23,6 +23,8 @@
#ifndef __NVGPU_CLK_ARB_H__ #ifndef __NVGPU_CLK_ARB_H__
#define __NVGPU_CLK_ARB_H__ #define __NVGPU_CLK_ARB_H__
struct gk20a;
#include <nvgpu/types.h> #include <nvgpu/types.h>
#include <nvgpu/bitops.h> #include <nvgpu/bitops.h>
#include <nvgpu/lock.h> #include <nvgpu/lock.h>
@@ -34,7 +36,6 @@
#include <nvgpu/barrier.h> #include <nvgpu/barrier.h>
#include <nvgpu/cond.h> #include <nvgpu/cond.h>
#include "gk20a/gk20a.h"
#include "clk/clk.h" #include "clk/clk.h"
#include "pstate/pstate.h" #include "pstate/pstate.h"
#include "lpwr/lpwr.h" #include "lpwr/lpwr.h"

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@@ -22,6 +22,7 @@
#include <nvgpu/bios.h> #include <nvgpu/bios.h>
#include <nvgpu/pmu.h> #include <nvgpu/pmu.h>
#include <nvgpu/clk_arb.h>
#include "gk20a/gk20a.h" #include "gk20a/gk20a.h"
#include "gp106/bios_gp106.h" #include "gp106/bios_gp106.h"

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@@ -29,6 +29,8 @@
#include <nvgpu/log.h> #include <nvgpu/log.h>
#include <nvgpu/enabled.h> #include <nvgpu/enabled.h>
#include <nvgpu/sizes.h> #include <nvgpu/sizes.h>
#include <nvgpu/list.h>
#include <nvgpu/clk_arb.h>
#include "ioctl_ctrl.h" #include "ioctl_ctrl.h"
#include "ioctl_dbg.h" #include "ioctl_dbg.h"

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@@ -42,6 +42,7 @@
#include <nvgpu/ctxsw_trace.h> #include <nvgpu/ctxsw_trace.h>
#include <nvgpu/vidmem.h> #include <nvgpu/vidmem.h>
#include <nvgpu/sim.h> #include <nvgpu/sim.h>
#include <nvgpu/clk_arb.h>
#include "platform_gk20a.h" #include "platform_gk20a.h"
#include "sysfs.h" #include "sysfs.h"

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@@ -22,6 +22,7 @@
#include <nvgpu/bug.h> #include <nvgpu/bug.h>
#include <nvgpu/pmu.h> #include <nvgpu/pmu.h>
#include <nvgpu/clk_arb.h>
#include "gk20a/gk20a.h" #include "gk20a/gk20a.h"
#include "perf.h" #include "perf.h"

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@@ -25,6 +25,7 @@
#include <nvgpu/vgpu/vgpu.h> #include <nvgpu/vgpu/vgpu.h>
#include <nvgpu/vgpu/tegra_vgpu.h> #include <nvgpu/vgpu/tegra_vgpu.h>
#include <nvgpu/dt.h> #include <nvgpu/dt.h>
#include <nvgpu/bug.h>
#include "gk20a/gk20a.h" #include "gk20a/gk20a.h"
#include "gk20a/channel_gk20a.h" #include "gk20a/channel_gk20a.h"
@@ -43,13 +44,13 @@ static struct tegra_hv_ivm_cookie *vgpu_css_reserve_mempool(struct gk20a *g)
err = nvgpu_dt_read_u32_index(g, "mempool-css", 1, &mempool); err = nvgpu_dt_read_u32_index(g, "mempool-css", 1, &mempool);
if (err) { if (err) {
nvgpu_err(g, "dt missing mempool-css"); nvgpu_err(g, "dt missing mempool-css");
return ERR_PTR(err); return (struct tegra_hv_ivm_cookie *)ERR_PTR(err);
} }
cookie = vgpu_ivm_mempool_reserve(mempool); cookie = vgpu_ivm_mempool_reserve(mempool);
if (IS_ERR_OR_NULL(cookie)) { if (IS_ERR_OR_NULL(cookie)) {
nvgpu_err(g, "mempool %u reserve failed", mempool); nvgpu_err(g, "mempool %u reserve failed", mempool);
return ERR_PTR(-EINVAL); return (struct tegra_hv_ivm_cookie *)ERR_PTR(-EINVAL);
} }
return cookie; return cookie;
} }