diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources
index b43a5ef29..1e8efe92a 100644
--- a/drivers/gpu/nvgpu/Makefile.sources
+++ b/drivers/gpu/nvgpu/Makefile.sources
@@ -245,8 +245,6 @@ srcs += common/utils/enabled.c \
 	hal/netlist/netlist_gm20b.c \
 	hal/netlist/netlist_gp10b.c \
 	hal/netlist/netlist_gv11b.c \
-	hal/sync/sema_cmdbuf_gk20a.c \
-	hal/sync/sema_cmdbuf_gv11b.c \
 	hal/sync/syncpt_cmdbuf_gk20a.c \
 	hal/sync/syncpt_cmdbuf_gv11b.c \
 	hal/pmu/pmu_gp106.c \
@@ -332,7 +330,9 @@ endif
 ifeq ($(CONFIG_NVGPU_KERNEL_MODE_SUBMIT),1)
 srcs += common/fifo/submit.c \
 	common/sync/channel_sync_semaphore.c \
-	hal/fifo/userd_gv11b.c
+	hal/fifo/userd_gv11b.c \
+	hal/sync/sema_cmdbuf_gk20a.c \
+	hal/sync/sema_cmdbuf_gv11b.c
 endif
 
 ifeq ($(CONFIG_NVGPU_FECS_TRACE),1)
diff --git a/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c
index 069cab598..f0680b674 100644
--- a/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c
+++ b/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c
@@ -486,6 +486,7 @@ static const struct gpu_ops vgpu_gp10b_ops = {
 		.syncpt = {
 			.alloc_buf = gk20a_syncpt_alloc_buf,
 			.free_buf = gk20a_syncpt_free_buf,
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 			.add_wait_cmd = gk20a_syncpt_add_wait_cmd,
 			.get_wait_cmd_size =
 					gk20a_syncpt_get_wait_cmd_size,
@@ -494,14 +495,17 @@ static const struct gpu_ops vgpu_gp10b_ops = {
 			.add_incr_cmd = gk20a_syncpt_add_incr_cmd,
 			.get_incr_cmd_size =
 					gk20a_syncpt_get_incr_cmd_size,
+#endif
 			.get_sync_ro_map = NULL,
 		},
-#endif
+#endif /* CONFIG_TEGRA_GK20A_NVHOST */
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 		.sema = {
 			.get_wait_cmd_size = gk20a_sema_get_wait_cmd_size,
 			.get_incr_cmd_size = gk20a_sema_get_incr_cmd_size,
 			.add_cmd = gk20a_sema_add_cmd,
 		},
+#endif
 	},
 	.engine_status = {
 		.read_engine_status_info = NULL,
diff --git a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c
index 64539e5ca..f0999aee5 100644
--- a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c
+++ b/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c
@@ -573,6 +573,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
 		.syncpt = {
 			.alloc_buf = vgpu_gv11b_syncpt_alloc_buf,
 			.free_buf = vgpu_gv11b_syncpt_free_buf,
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 			.add_wait_cmd = gv11b_syncpt_add_wait_cmd,
 			.get_wait_cmd_size =
 					gv11b_syncpt_get_wait_cmd_size,
@@ -581,14 +582,17 @@ static const struct gpu_ops vgpu_gv11b_ops = {
 			.add_incr_cmd = gv11b_syncpt_add_incr_cmd,
 			.get_incr_cmd_size =
 					gv11b_syncpt_get_incr_cmd_size,
+#endif
 			.get_sync_ro_map = vgpu_gv11b_syncpt_get_sync_ro_map,
 		},
 #endif
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 		.sema = {
 			.get_wait_cmd_size = gv11b_sema_get_wait_cmd_size,
 			.get_incr_cmd_size = gv11b_sema_get_incr_cmd_size,
 			.add_cmd = gv11b_sema_add_cmd,
 		},
+#endif
 	},
 	.engine_status = {
 		.read_engine_status_info = NULL,
diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c
index c0d88e013..43a3312fe 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c
@@ -670,6 +670,7 @@ static const struct gpu_ops gm20b_ops = {
 		.syncpt = {
 			.alloc_buf = gk20a_syncpt_alloc_buf,
 			.free_buf = gk20a_syncpt_free_buf,
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 			.add_wait_cmd = gk20a_syncpt_add_wait_cmd,
 			.get_incr_per_release =
 					gk20a_syncpt_get_incr_per_release,
@@ -678,14 +679,17 @@ static const struct gpu_ops gm20b_ops = {
 			.add_incr_cmd = gk20a_syncpt_add_incr_cmd,
 			.get_incr_cmd_size =
 					gk20a_syncpt_get_incr_cmd_size,
+#endif
 			.get_sync_ro_map = NULL,
 		},
-#endif
+#endif /* CONFIG_TEGRA_GK20A_NVHOST */
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 		.sema = {
 			.get_wait_cmd_size = gk20a_sema_get_wait_cmd_size,
 			.get_incr_cmd_size = gk20a_sema_get_incr_cmd_size,
 			.add_cmd = gk20a_sema_add_cmd,
 		},
+#endif
 	},
 	.engine_status = {
 		.read_engine_status_info =
diff --git a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c
index e841d92db..a78a279ed 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c
@@ -751,6 +751,7 @@ static const struct gpu_ops gp10b_ops = {
 		.syncpt = {
 			.alloc_buf = gk20a_syncpt_alloc_buf,
 			.free_buf = gk20a_syncpt_free_buf,
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 			.add_wait_cmd = gk20a_syncpt_add_wait_cmd,
 			.get_incr_per_release =
 					gk20a_syncpt_get_incr_per_release,
@@ -759,14 +760,17 @@ static const struct gpu_ops gp10b_ops = {
 			.add_incr_cmd = gk20a_syncpt_add_incr_cmd,
 			.get_incr_cmd_size =
 					gk20a_syncpt_get_incr_cmd_size,
+#endif
 			.get_sync_ro_map = NULL,
 		},
-#endif
+#endif /* CONFIG_TEGRA_GK20A_NVHOST */
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 		.sema = {
 			.get_wait_cmd_size = gk20a_sema_get_wait_cmd_size,
 			.get_incr_cmd_size = gk20a_sema_get_incr_cmd_size,
 			.add_cmd = gk20a_sema_add_cmd,
 		},
+#endif
 	},
 	.engine_status = {
 		.read_engine_status_info =
diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
index 73f8d5c83..d4530979c 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
@@ -884,6 +884,7 @@ static const struct gpu_ops gv11b_ops = {
 		.syncpt = {
 			.alloc_buf = gv11b_syncpt_alloc_buf,
 			.free_buf = gv11b_syncpt_free_buf,
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 			.add_wait_cmd = gv11b_syncpt_add_wait_cmd,
 			.get_wait_cmd_size =
 					gv11b_syncpt_get_wait_cmd_size,
@@ -892,14 +893,17 @@ static const struct gpu_ops gv11b_ops = {
 					gv11b_syncpt_get_incr_cmd_size,
 			.get_incr_per_release =
 					gv11b_syncpt_get_incr_per_release,
+#endif
 			.get_sync_ro_map = gv11b_syncpt_get_sync_ro_map,
 		},
-#endif
+#endif /* CONFIG_TEGRA_GK20A_NVHOST */
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 		.sema = {
 			.get_wait_cmd_size = gv11b_sema_get_wait_cmd_size,
 			.get_incr_cmd_size = gv11b_sema_get_incr_cmd_size,
 			.add_cmd = gv11b_sema_add_cmd,
 		},
+#endif
 	},
 	.engine_status = {
 		.read_engine_status_info =
diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c
index d4ca7f6d7..75ce312cd 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c
@@ -929,6 +929,7 @@ static const struct gpu_ops tu104_ops = {
 		.syncpt = {
 			.alloc_buf = gv11b_syncpt_alloc_buf,
 			.free_buf = gv11b_syncpt_free_buf,
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 			.add_wait_cmd = gv11b_syncpt_add_wait_cmd,
 			.get_wait_cmd_size =
 					gv11b_syncpt_get_wait_cmd_size,
@@ -937,14 +938,17 @@ static const struct gpu_ops tu104_ops = {
 					gv11b_syncpt_get_incr_cmd_size,
 			.get_incr_per_release =
 					gv11b_syncpt_get_incr_per_release,
+#endif
 			.get_sync_ro_map = gv11b_syncpt_get_sync_ro_map,
 		},
-#endif
+#endif /* CONFIG_TEGRA_GK20A_NVHOST */
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 		.sema = {
 			.get_wait_cmd_size = gv11b_sema_get_wait_cmd_size,
 			.get_incr_cmd_size = gv11b_sema_get_incr_cmd_size,
 			.add_cmd = gv11b_sema_add_cmd,
 		},
+#endif
 	},
 	.engine_status = {
 		.read_engine_status_info =
diff --git a/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gk20a.c b/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gk20a.c
index 9cf61ba8d..90e9e8633 100644
--- a/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gk20a.c
+++ b/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gk20a.c
@@ -28,6 +28,7 @@
 
 #include "syncpt_cmdbuf_gk20a.h"
 
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 void gk20a_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va)
@@ -91,6 +92,7 @@ u32 gk20a_syncpt_get_incr_cmd_size(bool wfi_cmd)
 		return 6U;
 	}
 }
+#endif
 
 void gk20a_syncpt_free_buf(struct nvgpu_channel *c,
 		struct nvgpu_mem *syncpt_buf)
diff --git a/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gk20a.h b/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gk20a.h
index 9321248c4..190bc8cfa 100644
--- a/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gk20a.h
+++ b/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gk20a.h
@@ -30,6 +30,7 @@ struct nvgpu_mem;
 
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 void gk20a_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va);
@@ -39,6 +40,8 @@ void gk20a_syncpt_add_incr_cmd(struct gk20a *g,
 		bool wfi_cmd, struct priv_cmd_entry *cmd,
 		u32 id, u64 gpu_va);
 u32 gk20a_syncpt_get_incr_cmd_size(bool wfi_cmd);
+#endif
+
 void gk20a_syncpt_free_buf(struct nvgpu_channel *c,
 		struct nvgpu_mem *syncpt_buf);
 
@@ -47,6 +50,7 @@ int gk20a_syncpt_alloc_buf(struct nvgpu_channel *c,
 
 #else
 
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 static inline void gk20a_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va)
@@ -69,6 +73,7 @@ static inline u32 gk20a_syncpt_get_incr_cmd_size(bool wfi_cmd)
 {
 	return 0U;
 }
+#endif
 static inline void gk20a_syncpt_free_buf(struct nvgpu_channel *c,
 		struct nvgpu_mem *syncpt_buf)
 {
diff --git a/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gv11b.c b/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gv11b.c
index c63b6c612..fbd645690 100644
--- a/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gv11b.c
+++ b/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gv11b.c
@@ -116,6 +116,7 @@ int gv11b_syncpt_get_sync_ro_map(struct vm_gk20a *vm,
 	return 0;
 }
 
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 void gv11b_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va_base)
@@ -192,3 +193,4 @@ u32 gv11b_syncpt_get_incr_cmd_size(bool wfi_cmd)
 {
 	return 10U;
 }
+#endif
diff --git a/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gv11b.h b/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gv11b.h
index 62dffcd13..9df549b97 100644
--- a/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gv11b.h
+++ b/drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gv11b.h
@@ -32,6 +32,7 @@ struct vm_gk20a;
 
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 void gv11b_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va);
@@ -41,6 +42,8 @@ void gv11b_syncpt_add_incr_cmd(struct gk20a *g,
 		bool wfi_cmd, struct priv_cmd_entry *cmd,
 		u32 id, u64 gpu_va);
 u32 gv11b_syncpt_get_incr_cmd_size(bool wfi_cmd);
+#endif /* CONFIG_NVGPU_KERNEL_MODE_SUBMIT */
+
 void gv11b_syncpt_free_buf(struct nvgpu_channel *c,
 		struct nvgpu_mem *syncpt_buf);
 
@@ -52,6 +55,7 @@ int gv11b_syncpt_get_sync_ro_map(struct vm_gk20a *vm,
 
 #else
 
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 static inline void gv11b_syncpt_add_wait_cmd(struct gk20a *g,
 		struct priv_cmd_entry *cmd, u32 off,
 		u32 id, u32 thresh, u64 gpu_va)
@@ -74,6 +78,8 @@ static inline u32 gv11b_syncpt_get_incr_cmd_size(bool wfi_cmd)
 {
 	return 0U;
 }
+#endif
+
 static inline void gv11b_syncpt_free_buf(struct nvgpu_channel *c,
 		struct nvgpu_mem *syncpt_buf)
 {
diff --git a/drivers/gpu/nvgpu/include/nvgpu/channel_sync_syncpt.h b/drivers/gpu/nvgpu/include/nvgpu/channel_sync_syncpt.h
index 0e46de3e0..d19bc69a9 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/channel_sync_syncpt.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/channel_sync_syncpt.h
@@ -35,6 +35,7 @@
 
 struct nvgpu_channel;
 struct nvgpu_channel_sync_syncpt;
+struct priv_cmd_entry;
 
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index e31dc476c..7fdb2b5aa 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -1191,6 +1191,7 @@ struct gpu_ops {
 					struct nvgpu_mem *syncpt_buf);
 			void (*free_buf)(struct nvgpu_channel *c,
 					struct nvgpu_mem *syncpt_buf);
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 			void (*add_wait_cmd)(struct gk20a *g,
 					struct priv_cmd_entry *cmd, u32 off,
 					u32 id, u32 thresh, u64 gpu_va);
@@ -1200,11 +1201,13 @@ struct gpu_ops {
 					struct priv_cmd_entry *cmd,
 					u32 id, u64 gpu_va);
 			u32 (*get_incr_cmd_size)(bool wfi_cmd);
+			u32 (*get_incr_per_release)(void);
+#endif
 			int (*get_sync_ro_map)(struct vm_gk20a *vm,
 					u64 *base_gpuva, u32 *sync_size);
-			u32 (*get_incr_per_release)(void);
 		} syncpt;
-#endif
+#endif /* CONFIG_TEGRA_GK20A_NVHOST */
+#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
 		struct {
 			u32 (*get_wait_cmd_size)(void);
 			u32 (*get_incr_cmd_size)(void);
@@ -1213,6 +1216,7 @@ struct gpu_ops {
 				struct priv_cmd_entry *cmd,
 				u32 off, bool acquire, bool wfi);
 		} sema;
+#endif
 	} sync;
 	struct {
 		int (*alloc_inst)(struct gk20a *g, struct nvgpu_channel *ch);