nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 17:36:20 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: use instance specific max subctx count

Browse Source 
Store nvgpu_cdev pointer in struct tsg_private and assign it in
nvgpu_ioctl_tsg_open.

In gk20a_tsg_ioctl_bind_channel_ex(), extract gpu_instance_id from
cdev pointer and then extract instance specific max VEID count from
gpu_instance_id.

Use this max veid count to validate subcontext id coming from user.

Jira NVGPU-5648

Change-Id: I71cea5180e1ced1a72818d160f1a951c1c6ec770
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2438925
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Deepak Nibade
2020-10-30 12:14:45 +05:30
committed by Alex Waterman
parent dacdaf0778
commit dbad874d9e
3 changed files with 22 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c
View File

@@ -639,7 +639,7 @@ clean_up:
return err; return err;
} }
static int gk20a_ctrl_open_tsg(struct gk20a *g, static int gk20a_ctrl_open_tsg(struct gk20a *g, struct nvgpu_cdev *cdev,
struct nvgpu_gpu_open_tsg_args *args) struct nvgpu_gpu_open_tsg_args *args)
{ {
int err; int err;
@@ -660,7 +660,7 @@ static int gk20a_ctrl_open_tsg(struct gk20a *g,
goto clean_up; goto clean_up;
} }
err = nvgpu_ioctl_tsg_open(g, file); err = nvgpu_ioctl_tsg_open(g, cdev, file);
if (err) if (err)
goto clean_up_file; goto clean_up_file;
@@ -2047,7 +2047,7 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
(struct nvgpu_alloc_as_args *)buf); (struct nvgpu_alloc_as_args *)buf);
break; break;
case NVGPU_GPU_IOCTL_OPEN_TSG: case NVGPU_GPU_IOCTL_OPEN_TSG:
err = gk20a_ctrl_open_tsg(g, err = gk20a_ctrl_open_tsg(g, priv->cdev,
(struct nvgpu_gpu_open_tsg_args *)buf); (struct nvgpu_gpu_open_tsg_args *)buf);
break; break;
case NVGPU_GPU_IOCTL_GET_TPC_MASKS: case NVGPU_GPU_IOCTL_GET_TPC_MASKS:

22
drivers/gpu/nvgpu/os/linux/ioctl_tsg.c
View File

@@ -33,6 +33,7 @@
#include <nvgpu/tsg.h> #include <nvgpu/tsg.h>
#include <nvgpu/fifo.h> #include <nvgpu/fifo.h>
#include <nvgpu/nvgpu_init.h> #include <nvgpu/nvgpu_init.h>
#include <nvgpu/grmgr.h>
#include "platform_gk20a.h" #include "platform_gk20a.h"
#include "ioctl_tsg.h" #include "ioctl_tsg.h"
@@ -43,6 +44,7 @@
struct tsg_private { struct tsg_private {
struct gk20a *g; struct gk20a *g;
struct nvgpu_tsg *tsg; struct nvgpu_tsg *tsg;
struct nvgpu_cdev *cdev;
}; };
extern const struct file_operations gk20a_tsg_ops; extern const struct file_operations gk20a_tsg_ops;
@@ -84,11 +86,14 @@ static int nvgpu_tsg_bind_channel_fd(struct nvgpu_tsg *tsg, int ch_fd)
} }
static int gk20a_tsg_ioctl_bind_channel_ex(struct gk20a *g, static int gk20a_tsg_ioctl_bind_channel_ex(struct gk20a *g,
struct nvgpu_tsg *tsg, struct nvgpu_tsg_bind_channel_ex_args *arg) struct tsg_private *priv, struct nvgpu_tsg_bind_channel_ex_args *arg)
{ {
struct nvgpu_tsg *tsg = priv->tsg;
struct nvgpu_sched_ctrl *sched = &g->sched_ctrl; struct nvgpu_sched_ctrl *sched = &g->sched_ctrl;
struct nvgpu_channel *ch; struct nvgpu_channel *ch;
struct nvgpu_gr_config *gr_config = nvgpu_gr_get_config_ptr(g); struct nvgpu_gr_config *gr_config = nvgpu_gr_get_config_ptr(g);
u32 max_subctx_count;
u32 gpu_instance_id;
int err = 0; int err = 0;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid); nvgpu_log(g, gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid);
@@ -125,7 +130,12 @@ static int gk20a_tsg_ioctl_bind_channel_ex(struct gk20a *g,
tsg->tpc_pg_enabled = false; nvgpu_log(g, gpu_dbg_info, "dynamic TPC-PG not enabled"); tsg->tpc_pg_enabled = false; nvgpu_log(g, gpu_dbg_info, "dynamic TPC-PG not enabled");
} }
if (arg->subcontext_id < g->fifo.max_subctx_count) { gpu_instance_id = nvgpu_get_gpu_instance_id_from_cdev(g, priv->cdev);
nvgpu_assert(gpu_instance_id < g->mig.num_gpu_instances);
max_subctx_count = nvgpu_grmgr_get_gpu_instance_max_veid_count(g, gpu_instance_id);
if (arg->subcontext_id < max_subctx_count) {
ch->subctx_id = arg->subcontext_id; ch->subctx_id = arg->subcontext_id;
} else { } else {
err = -EINVAL; err = -EINVAL;
@@ -416,7 +426,8 @@ static int gk20a_tsg_event_id_ctrl(struct gk20a *g, struct nvgpu_tsg *tsg,
} }
#endif /* CONFIG_NVGPU_CHANNEL_TSG_CONTROL */ #endif /* CONFIG_NVGPU_CHANNEL_TSG_CONTROL */
int nvgpu_ioctl_tsg_open(struct gk20a *g, struct file *filp) int nvgpu_ioctl_tsg_open(struct gk20a *g, struct nvgpu_cdev *cdev,
struct file *filp)
{ {
struct tsg_private *priv; struct tsg_private *priv;
struct nvgpu_tsg *tsg; struct nvgpu_tsg *tsg;
@@ -452,6 +463,7 @@ int nvgpu_ioctl_tsg_open(struct gk20a *g, struct file *filp)
priv->g = g; priv->g = g;
priv->tsg = tsg; priv->tsg = tsg;
priv->cdev = cdev;
filp->private_data = priv; filp->private_data = priv;
gk20a_sched_ctrl_tsg_added(g, tsg); gk20a_sched_ctrl_tsg_added(g, tsg);
@@ -482,7 +494,7 @@ int nvgpu_ioctl_tsg_dev_open(struct inode *inode, struct file *filp)
return ret; return ret;
} }
ret = nvgpu_ioctl_tsg_open(g, filp); ret = nvgpu_ioctl_tsg_open(g, cdev, filp);
gk20a_idle(g); gk20a_idle(g);
nvgpu_log_fn(g, "done"); nvgpu_log_fn(g, "done");
@@ -675,7 +687,7 @@ long nvgpu_ioctl_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
case NVGPU_TSG_IOCTL_BIND_CHANNEL_EX: case NVGPU_TSG_IOCTL_BIND_CHANNEL_EX:
{ {
err = gk20a_tsg_ioctl_bind_channel_ex(g, tsg, err = gk20a_tsg_ioctl_bind_channel_ex(g, priv,
(struct nvgpu_tsg_bind_channel_ex_args *)buf); (struct nvgpu_tsg_bind_channel_ex_args *)buf);
break; break;
} }

3
drivers/gpu/nvgpu/os/linux/ioctl_tsg.h
View File

@@ -17,12 +17,13 @@ struct inode;
struct file; struct file;
struct gk20a; struct gk20a;
struct nvgpu_ref; struct nvgpu_ref;
struct nvgpu_cdev;
struct nvgpu_tsg *nvgpu_tsg_get_from_file(int fd); struct nvgpu_tsg *nvgpu_tsg_get_from_file(int fd);
int nvgpu_ioctl_tsg_dev_release(struct inode *inode, struct file *filp); int nvgpu_ioctl_tsg_dev_release(struct inode *inode, struct file *filp);
int nvgpu_ioctl_tsg_dev_open(struct inode *inode, struct file *filp); int nvgpu_ioctl_tsg_dev_open(struct inode *inode, struct file *filp);
int nvgpu_ioctl_tsg_open(struct gk20a *g, struct file *filp); int nvgpu_ioctl_tsg_open(struct gk20a *g, struct nvgpu_cdev *cdev, struct file *filp);
long nvgpu_ioctl_tsg_dev_ioctl(struct file *filp, long nvgpu_ioctl_tsg_dev_ioctl(struct file *filp,
unsigned int cmd, unsigned long arg); unsigned int cmd, unsigned long arg);
void nvgpu_ioctl_tsg_release(struct nvgpu_ref *ref); void nvgpu_ioctl_tsg_release(struct nvgpu_ref *ref);