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gpu: nvgpu: add vpr flag in gpu characteristics
VPR is currently not supported in virtualized configuration. Allow reporting VPR capability in gpu characteristics Jira EVLR-2236 Change-Id: Id61a0045577e4add0d9cdfddcefcedd5b20eb1dd Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1639798 (cherry picked from commit 4136b74fd4435966ee2e69ec88fb66424382a7c0) Reviewed-on: https://git-master.nvidia.com/r/1640712 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -176,6 +176,8 @@ static struct nvgpu_flags_mapping flags_mapping[] = {
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NVGPU_SUPPORT_TSG_SUBCONTEXTS},
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NVGPU_SUPPORT_TSG_SUBCONTEXTS},
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{NVGPU_GPU_FLAGS_SUPPORT_SCG,
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{NVGPU_GPU_FLAGS_SUPPORT_SCG,
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NVGPU_SUPPORT_SCG},
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NVGPU_SUPPORT_SCG},
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{NVGPU_GPU_FLAGS_SUPPORT_VPR,
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NVGPU_SUPPORT_VPR},
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};
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};
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static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g)
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static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g)
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@@ -667,6 +667,7 @@ void gk20a_tegra_idle(struct device *dev)
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void gk20a_tegra_init_secure_alloc(struct gk20a *g)
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void gk20a_tegra_init_secure_alloc(struct gk20a *g)
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{
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{
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g->ops.secure_alloc = gk20a_tegra_secure_alloc;
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g->ops.secure_alloc = gk20a_tegra_secure_alloc;
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__nvgpu_set_enabled(g, NVGPU_SUPPORT_VPR, true);
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}
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}
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#ifdef CONFIG_COMMON_CLK
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#ifdef CONFIG_COMMON_CLK
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@@ -113,6 +113,8 @@ struct gk20a;
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#define NVGPU_SEC_SECUREGPCCS 41
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#define NVGPU_SEC_SECUREGPCCS 41
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#define NVGPU_SEC_PRIVSECURITY 42
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#define NVGPU_SEC_PRIVSECURITY 42
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/* VPR is supported */
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#define NVGPU_SUPPORT_VPR 43
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/*
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/*
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* Nvlink flags
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* Nvlink flags
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@@ -156,6 +156,8 @@ struct nvgpu_gpu_zbc_query_table_args {
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#define NVGPU_GPU_FLAGS_SUPPORT_SCG (1ULL << 25)
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#define NVGPU_GPU_FLAGS_SUPPORT_SCG (1ULL << 25)
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/* GPU_VA address of a syncpoint is supported */
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/* GPU_VA address of a syncpoint is supported */
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#define NVGPU_GPU_FLAGS_SUPPORT_SYNCPOINT_ADDRESS (1ULL << 26)
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#define NVGPU_GPU_FLAGS_SUPPORT_SYNCPOINT_ADDRESS (1ULL << 26)
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/* VPR is supported */
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#define NVGPU_GPU_FLAGS_SUPPORT_VPR (1ULL << 27)
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/* SM LRF ECC is enabled */
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/* SM LRF ECC is enabled */
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
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/* SM SHM ECC is enabled */
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/* SM SHM ECC is enabled */
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