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gpu: nvgpu: MISRA fixes for composite expressions

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MISRA rules 10.6, 10.7, and 10.8 prevent mixing of types in composite
expressions. Resolve these violations by casting variables/constants to
the appropriate types.

Jira NVGPU-850
Jira NVGPU-853
Jira NVGPU-851

Change-Id: If6db312187211bc428cf465929082118565dacf4
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1931156
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Adeel Raza
2018-10-23 13:24:39 -07:00
committed by mobile promotions
parent a733659f19
commit dc37ca4559
49 changed files with 184 additions and 150 deletions
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2
drivers/gpu/nvgpu/common/mm/page_allocator.c
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@@ -1001,7 +1001,7 @@ static int nvgpu_page_alloc_init_slabs(struct nvgpu_page_allocator *a)
for (i = 0; i < nr_slabs; i++) {
struct page_alloc_slab *slab = &a->slabs[i];
slab->slab_size = SZ_4K * (1 << i);
slab->slab_size = U32(SZ_4K) * BIT32(i);
nvgpu_init_list_node(&slab->empty);
nvgpu_init_list_node(&slab->partial);
nvgpu_init_list_node(&slab->full);