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gpu: nvgpu: MISRA fixes for composite expressions

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MISRA rules 10.6, 10.7, and 10.8 prevent mixing of types in composite
expressions. Resolve these violations by casting variables/constants to
the appropriate types.

Jira NVGPU-850
Jira NVGPU-853
Jira NVGPU-851

Change-Id: If6db312187211bc428cf465929082118565dacf4
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1931156
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Adeel Raza
2018-10-23 13:24:39 -07:00
committed by mobile promotions
parent a733659f19
commit dc37ca4559
49 changed files with 184 additions and 150 deletions
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6
drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
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@@ -177,9 +177,11 @@ static inline unsigned int gk20a_ce_get_method_size(int request_operation,
}
if (request_operation & NVGPU_CE_PHYS_MODE_TRANSFER) {
methodsize = (2 + (16 * iterations)) * sizeof(u32);
methodsize = (2U + (16U * iterations)) *
(unsigned int)sizeof(u32);
} else if (request_operation & NVGPU_CE_MEMSET) {
methodsize = (2 + (15 * iterations)) * sizeof(u32);
methodsize = (2U + (15U * iterations)) *
(unsigned int)sizeof(u32);
}
return methodsize;